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參數資料
| 型號： | ADG836YCP-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | 0.5CMOS 1.65 V TO 3.6 V Dual SPDT/2:1 MUX |
| 中文描述： | DUAL 2-CHANNEL, SGL POLE DOUBLE THROW SWITCH, QCC12 |
| 封裝： | MO-220-VEED-1, LFCSP-12 |
| 文件頁數： | 6/12頁 |
| 文件大小： | 652K |
| 代理商： | ADG836YCP-REEL |
ADG836
–6–
TERMINOLOGY
V
DD
Most positive power supply potential.
I
DD
Positive supply current.
GND Ground (0 V) reference.
S Source terminal. May be an input or output.
D Drain terminal. May be an input or output.
IN Logic control input.
V
D
(V
S
) Analog voltage on terminals D, S.
R
ON
Ohmic resistance between D and S.
R
FLAT (ON)
Flatness is defined as the difference between the maximum and minimum value of on resistance as measured
over the specified analog signal range.
R
ON
On resistance match between any two channels.
I
S
(OFF) Source leakage current with the switch off.
I
D
(OFF) Drain leakage current with the switch off.
I
D
, I
S
(ON) Channel leakage current with the switch on.
V
INL
Maximum input voltage for Logic 0.
V
INH
Minimum input voltage for Logic 1.
I
INL
(I
INH
) Input current of the digital input.
C
S
(OFF) Off switch source capacitance. Measured with reference to ground.
C
D
(OFF) Off switch drain capacitance. Measured with reference to ground.
C
D
, C
S
(ON) On switch capacitance. Measured with reference to ground.
C
IN
Digital input capacitance.
t
ON
Delay time between the 50% and the 90% points of the digital input and switch on condition.
t
OFF
Delay time between the 50% and the 90% points of the digital input and switch off condition.
t
BBM
On or off time measured between the 80% points of both switches when switching from one to another.
Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during on-off switching.
Off Isolation A measure of unwanted signal coupling through an off switch.
Crosstalk A measure of unwanted signal which is coupled through from one channel to another as a result of parasitic
capacitance.
–3 dB Bandwidth The frequency at which the output is attenuated by 3 dB.
On Response The frequency response of the on switch.
Insertion Loss The loss due to the on resistance of the switch.
THD + N The ratio of the harmonics amplitude plus noise of a signal, to the fundamental.
10-Lead MSOP
(RM-10)
12-Lead LFCSP
(CP-12)
PIN CONFIGURATIONS
REV. 0
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| ADG836YCPZ-REEL7 | 功能描述:IC SWITCH DUAL SPDT 12LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關，多路復用器，多路分解器 系列:- 標準包裝:1,000 系列:- 功能:多路復用器 電路:1 x 4:1 導通狀態電阻:- 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±5V 電流 - 電源:7mA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:16-SOIC 包裝:帶卷 (TR) |
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