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參數(shù)資料
| 型號(hào)： | ADM1025AARQ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 電源管理 |
| 英文描述： | Low-Cost PC Hardware Monitor ASIC |
| 中文描述： | 6-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO16 |
| 封裝： | 0.025 INCH PITCH, SOIC, QSOP-16 |
| 文件頁數(shù)： | 8/16頁 |
| 文件大小： | 164K |
| 代理商： | ADM1025AARQ |
REV. A
ADM1025/ADM1025A
–8–
When reading data from a register there are two possibilities:
1. If the ADM1025/ADM1025A’s Address Pointer Register
value is unknown or not the desired value, it is first necessary
to set it to the correct value before data can be read from the
desired data register. This is done by performing a write to
the ADM1025/ADM1025A as before, but only the data byte
containing the register address is sent, as data is not to be
written to the register. This is shown in Figure 9b.
A read operation is then performed consisting of the serial bus
address, R/
W
bit set to 1, followed by the data byte read from
the data register. This is shown in Figure 9c.
2. If the Address Pointer Register is known to be already at the
desired address, data can be read from the corresponding
data register without first writing to the Address Pointer
Register, so Figure 9b can be omitted.
NOTES
1. Although it is possible to read a data byte from a data register
without first writing to the Address Pointer Register, if the
Address Pointer Register is already at the correct value, it is
not possible to write data to a register without writing to the
Address Pointer Register, because the first data byte of a
write is always written to the Address Pointer Register.
2. In Figures 9a to 9c, the serial bus address is shown as the
default value 01011(A1)(A0), where A1 and A0 are set by
the three-state ADD pin.
3. In addition to supporting the Send Byte and Receive Byte
protocols, the ADM1025/ADM1025A also supports the
Read Byte protocol (see System Management Bus specifica-
tions Rev. 1.1 for more information).
4. If Reset or Interrupt functionality is required, address pin
cannot
be strapped to GND, as this would keep the ADD/
RST
/
INT
/NTO pin permanently low.
MEASUREMENT INPUTS
The ADM1025/ADM1025A has six external measurement
inputs, five for voltage and one (two pins) for temperature.
Internal measurements are also carried out on V
CC
and the
on-chip temperature sensor.
A-TO-D CONVERTER
These inputs are multiplexed into the on-chip, successive ap-
proximation, analog-to-digital converter. This has a resolution
of eight bits. The basic input range is zero to 2.5 V, but the
inputs have built-in attenuators to allow measurement of 2.5 V,
3.3 V, 5 V, 12 V and the processor core voltage V
CCP
, without
any external components. To allow for the tolerance of these
supply voltages, the A-to-D converter produces an output of
3/4 full scale (decimal 192) for the nominal input voltage, and
so has adequate headroom to cope with overvoltages. Table II
shows the input ranges of the analog inputs and output codes of
the A-to-D converter.
When the ADC is running, it samples and converts an input
every 11.6 ms, except for the external temperature (D+ and D–)
input. This has special input signal conditioning and is averaged
over 16 conversions to reduce noise; a measurement on this
input takes nominally 34.8 ms.
INPUT CIRCUITS
The internal structure for the analog inputs are shown in Figure
10. Each input circuit consists of an input protection diode, an
attenuator, plus a capacitor to form a first-order low-pass filter
which gives the input immunity to high frequency noise.
35pF
22.7k
122.2k
12V
IN
25pF
55.2k
91.6k
5V
IN
25pF
82.4k
62.6k
3.3V
IN
25pF
111.2k
36.7k
2.5V
IN
10pF
105k
19.6k
V
CCPIN
MUX
Figure 10. Structure of Analog Inputs
R/W
0
SCL
SDA
1
0
1
1
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
ACK. BY
ADM1025
START BY
MASTER
1
9
1
ACK. BY
ADM1025
9
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
STOP BY
MASTER
Figure 9b. Writing to the Address Pointer Register Only
R/
W
0
SCL
SDA
1
0
1
1
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
NO ACK.
BY MASTER
START BY
MASTER
1
9
1
ACK. BY
ADM1025
9
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
DATA BYTE FROM ADM1025
STOP BY
MASTER
Figure 9c. Reading Data from a Previously Selected Register
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