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參數(shù)資料
型號(hào): ADM1033ARQZ
廠商: Analog Devices, Inc.
英文描述: Thermal Monitor and Fan Speed (RPM) Controller
中文描述: 熱監(jiān)測(cè)和風(fēng)扇轉(zhuǎn)速(RPM)控制器
文件頁數(shù): 14/40頁
文件大?。?/td> 1164K
代理商: ADM1033ARQZ
ADM1033
REGISTER ADDRESSES FOR
SINGLE/BLOCK BYTE MODES
The ADM1033 supports single-byte and multiple-byte (block)
read and write operations. The register address determines
whether a single-byte or block operation is run. For a single-
byte operation, the MSB of the register address is set to 0; for a
multiple-byte operation, it is set to 1. The number of bytes read
from the ADM1033 in a multiple-byte operation is set in the
#Bytes/Block Read Register at Address 0x00. The number of
bytes written to it is specified in the block-write operation. The
addresses quoted in the register map and throughout this data
sheet assume single-byte operation. For multiple-byte opera-
tions, set the MSB of each register address to 1.
Rev. 0 | Page 14 of 40
The SMBus specifications define protocols for different types of
read and write operations. The ADM1033 supports the
following SMBus write protocols: send byte, write byte, block
write, receive byte, and block read. The following abbreviations
are used in the diagrams:
S—START
P—STOP
R—READ
W—WRITE
A—ACKNOWLEDGE
A—NO ACKNOWLEDGE
WRITE OPERATIONS
Send Byte
In this operation, the master device sends a single-command
byte to a slave device as follows:
1.
The master device asserts a start condition on SDA.
2.
The master sends a 7-bit address followed by the write bit
(low).
3.
The addressed slave device asserts ACK on SDA.
4.
The master sends the register address.
5.
The slave asserts ACK on SDA.
6.
The master asserts a stop condition on SDA, and the
transaction ends.
SLAVE
ADDRESS
S
REG
ADDRESS
W A
A P
0
Figure 21. Send Byte
The ADM1033 uses the send-byte operation to write a register
address to the APR for a subsequent read from the same
address. This is illustrated in Figure 21. The user may be
required to read data from the register immediately after setting
up the address. If so, the master can assert a repeat start
condition immediately after the final ACK and carry out a
single-byte read without asserting an intermediate stop condition.
Write Byte
In this operation, the master device sends the register address
and one data byte to the slave device as follows:
1.
2.
The master asserts a start condition on SDA.
The master sends the 7-bit slave address followed by a
write bit (low).
The addressed slave device asserts ACK on SDA.
The master sends the register address. The MSB of the
command code should equal 0 for a write-byte operation.
If the MSB equals 1, a block-write operation takes place.
The slave asserts ACK on SDA.
The master sends a data byte.
The slave asserts ACK on SDA.
The master asserts a stop condition on SDA to end the
transaction.
3.
4.
5.
6.
7.
8.
SLAVE
ADDRESS
S
REG
ADDRESS
DATA
W
A
A
A
P
0
Figure 22. Write Byte
Block Write
In this operation, the master device writes a block of data to a
slave address as follows. A maximum number of 32 bytes can
be written.
1.
The master asserts a start condition on SDA.
2.
The master sends the 7-bit slave address followed by a write
bit (low).
3.
The addressed slave device asserts ACK on SDA.
4.
The master sends the register address. This register address
sets up the address pointer register and determines if a
block write (MSB = 1) or a byte write (MSB = 0) takes place.
5.
The slave asserts ACK on SDA.
6.
The master sends the byte count.
7.
The slave asserts ACK on SDA.
8.
The master sends N data bytes.
9.
The slave asserts ACK on SDA after each byte.
10.
The master asserts a stop condition on SDA to end the
transaction.
SLAVE
ADDRESS
S
BYTE
COUNT
DATA 2
DATA 1
REGISTER
ADDRESS
W
A
A
P
A
A
A
DATA N
A
0
Figure 23. Block Write
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