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參數資料
| 型號： | ADM1041AARQZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網絡 |
| 英文描述： | Secondary-Side Controller with Current Share and Housekeeping |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO24 |
| 封裝： | LEAD FREE, MO-137AE, QSOP-24 |
| 文件頁數： | 16/56頁 |
| 文件大?。?/td> | 991K |
| 代理商： | ADM1041AARQZ |
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ADM1041A
Pin No.
23
Rev. 0 | Page 16 of 56
Mnemonic
SHRS+
Description
Current Share Sense. This is the noninverting input of a differential sense amplifier looking at the voltage on
the share bus. For testing purposes, this pin is normally connected to SHRO. Calibration always expects this
pin to be at 2.0 V with respect to SHRS–/V
S
–. If a higher share voltage is required, a resistor divider from SHRO
or an additional gain stage, must be used.
Current Share Output. This output is capable of driving the share bus of several power supplies between 0 V
and V
DD
– 0.4 V (10 kΩ bus pull-down in each supply). Where a higher share bus voltage is required, an
external amplifier is necessary. The current share output from the supply, when bused with the share output
of other power supplies working in parallel, allows each of the supplies to contribute essentially equal
currents to the load.
24
SHRO
Table 4. Default Pin States During EEPROM Download
Pin No.
Mnemonic
11
CBD
State
High impedance (Hi-Z) at power-up and until the end of the EEPROM download (approximately 20 ms).
This pin is reconfigured at the end of the EEPROM download.
High impedance (Hi-Z) at power-up and until the end of the EEPROM download (approximately 20 ms).
This pin is reconfigured at the end of the EEPROM download.
Active low (low if DC_OK true) at power-up. This pin is reconfigured during the EEPROM download.
Active low (low if DC_OK true) at power-up. This pin is reconfigured during the EEPROM download.
High impedance (Hi-Z) at power-up and until the end of the EEPROM download (approximately 20 ms).
This pin is reconfigured at the end of the EEPROM download.
12
PEN
17
18
19
DC_OK
AC_OK
F
G
TERMINOLOGY
Table 5.
Mnemonic
POR
Description
Power-On Reset. When VDD is initially applied to the ADM1041A, the POR function clears all latches and puts
the logic into a state that allows a clean start-up.
Undervoltage Lockout. This is used on VDD to prevent spurious modes of operation that might occur if VDD
is below a specific voltage.
Constant Voltage Mode. This is the normal mode of operation of the power supply main output. The output
voltage remains constant over the whole range of current specified.
Constant Current Mode. This mode of operation occurs when the output is overloaded until or unless a
shutdown event is triggered. The output current control level remains constant down to 0 V.
Undervoltage Protection. If the output being monitored is detected as going under voltage, the UVP function
sends a fault signal. After a delay, PEN goes false, the output is disabled, and either latch-off or an autorestart
occurs, depending on the mode selected. The DC_OK output also goes false immediately to show that the
output is out of tolerance.
Overvoltage Protection. If the output being monitored is detected as going over voltage, the OVP function
latches and sends a fault signal, PEN goes false, and CBD goes true. The DC_OK output also goes false
immediately. OVP faults are always latching and require the cycling of PSON or VDD or SMBus command to
reset the latch.
Overcurrent Protection. If the output being monitored is detected as going over current for a certain time,
the OCP function sends out a fault signal that triggers a shutdown that can be latched or allowed to
autorestart, depending on the mode selected. Prior to shutting down, the DC_OK output goes false warning
the system that output is going to be lost. The latch is the same one used for OVP. For autorestart, the OCP
timeout period is configurable.
Overtemperature Protection. If the temperature being sensed is detected as going over the selected limit, the
OTP function sends out a fault signal that triggers a shutdown that can be latched or allowed to auto-restart
depending on the mode selected. Prior to shutting down, the DC_OK output goes false warning the system
that output is going to be lost. The latch is the same one used for OVP.
Undervoltage Blanking. The UVP function is blanked (disabled) during power-up or if the ACSENSE function is
false (ac line voltage is low). When in constant current mode, UVB is disabled. The status of ACSENSE must be
known to the IC, either by virtue of the on-board ACSENSE or communicated by the SMBus with the help of
an external microprocessor or by using AC_OKLink. When in constant-current mode, due to an overload, UVB
is applied for the overcurrent ride-through period.
UVL
CVMode
CCMode
UVP
OVP
OCP
OTP
UVB
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| ADM1041AARQZ-REEL | 功能描述:IC SECONDARY SIDE CTRLR 24QSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 電源控制器，監視器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 應用:多相控制器 輸入電壓:- 電源電壓:9 V ~ 14 V 電流 - 電源:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應商設備封裝:40-TQFN-EP（5x5） 包裝:帶卷 (TR) |
| ADM1041AARQZ-REEL7 | 功能描述:IC SECONDARY SIDE CTRLR 24QSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 電源控制器，監視器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 應用:多相控制器 輸入電壓:- 電源電壓:9 V ~ 14 V 電流 - 電源:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應商設備封裝:40-TQFN-EP（5x5） 包裝:帶卷 (TR) |
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| ADM1041ARQ | 功能描述:IC PWR SUPP MON/LOAD SHAR 24QSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 電源控制器，監視器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 應用:多相控制器 輸入電壓:- 電源電壓:9 V ~ 14 V 電流 - 電源:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應商設備封裝:40-TQFN-EP（5x5） 包裝:帶卷 (TR) |
| ADM1041ARQ-2 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
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