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參數資料
| 型號： | ADM1070ARTZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 10/16頁 |
| 文件大小： | 336K |
| 描述： | IC CTRLR HOTSWAP -48V SOT23-6 |
| 產品培訓模塊： | Hot Swap Design |
| 標準包裝： | 1 |
| 類型： | 熱交換控制器 |
| 應用： | 通用 |
| 內部開關： | 無 |
| 電源電壓： | -36 V ~ -77 V |
| 工作溫度： | -45°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-6 |
| 供應商設備封裝： | SOT-23-6 |
| 包裝： | 標準包裝 |
| 配用： | EVAL-ADM1073MEBZ-ND - BOARD EVALUATION FOR ADM1073 |
| 其它名稱： | ADM1070ARTZ-REEL7DKR |
REV. 0
10
ADM1070
2. If a voltage between the SENSE and V
EE
Pins increases to
100 mV (the analog current limit voltage) during t
LIMITON
,
then the ADM1070 takes action to reduce this current to a
safer level. The internal analog current limit loop dynami-
cally adjusts the gate drive, keeping the load current at the
100 mV/R
SENSE
level. The FET now acts as a current
source, limiting the load current to the level set by the value
of the sense resistor.
The sense voltage is also above the circuit breaker limit voltage,
so the limited consecutive retry function is still operational. If
the current fault is not cleared (sense resistor voltage brought
below 79 mV) after seven consecutive faults, then the device
is latched off.
3. If a serious short circuit occurs on the load side, the 48 V
supply can cause massive currents to flow very quickly.
Because of this, the gate voltage must be reduced quickly to
prevent a catastrophic failure. If the ADM1070 detects a
voltage greater than the fast current limit voltage (126 mV)
across the sense resistor, it is apparent that a serious short
circuit is present and the load current must be reduced as
quickly as possible. The fast current limit loop takes over and
pulls gate low much faster than in the previous case.
SENSE RESISTOR
The ADM1070s current limiting function can operate at differ-
ent current levels. The sense resistor is inserted between the V
EE
and sense pins, and a current fault occurs whenever the voltage
across the sense resistor is greater than 100 mV for longer than
the on time, t
LIMITON
. The current limit is determined by selec-
tion of the sense resistor, R
SENSE
. Table I shows how the
maximum allowable load current (I
LOAD(MAX)
) and the mini-
mum and maximum in-rush currents (I
LIMIT(MIN)
) and I
LIMIT(MAX)
)
are related to the value of R
SENSE
.
R
SENSE
I
LOAD(MAX)
I
LIMIT(MIN)
I
LIMIT(MAX)
(m)
(A)
(A)
(A)
5
12.0
18.0
22.0
10
6.0
9.0
11.0
15
4.0
6.0
7.3
18
3.3
5.0
6.1
22
2.7
4.1
5.0
33
1.8
2.7
3.3
47
1.3
1.9
2.3
51
1.2
1.7
2.2
68
0.9
1.3
1.6
75
0.8
1.2
1.5
90
0.7
1.0
1.2
SHUNT REGULATOR
A shunt regulator shunts the ADM1070 V
IN
Pin. Power is
derived from the 48 V supply through the combination of an
internal Zener diode and an external shunt resistor, R
DROP
.
Table II shows the operational voltage range and power dissipa-
tion for different values of R
DROP
. Note that 16 k& is the default
value for R
DROP
.
Min Allowable Max Allowable P
DROP
V
DD
Voltage V
DD
Voltage @ 48 V
R
DROP
(V)
(V)
(W)
10 k& (0.25 W) 26
61
0.13
12 k&
28.6
65.8
0.11
14 k&
31.2
70.2
0.09
16 k&
33.8
74.2
0.08
18 k&
36.4
78.1
0.07
20 k&
39
81.7
0.065
22 k&
41.6
85.2
0.06
10 k& (0.5 W) 26
81.7
0.13
12 k&
28.6
88.5
0.11
14 k&
31.2
94.7
0.09
16 k&
33.8
100.4
0.08
18 k&
36.4
105.9
0.07
20 k&
39
111
0.065
22 k&
41.6
115.9
0.06
INTERNAL UNDERVOLTAGE LOCKOUT
The V
IN
Pin is monitored for undervoltage lockout. When the
voltage at V
IN
is above 8.5 V (V
LKO
), the device is enabled. If
this voltage drops below 8.5 V, the device is disabled and gate is
pulled low. Note that this is unrelated to the undervoltage
and overvoltage functions performed at the UV/OV Pin.
TIMER
The TIMER Pin on the ADM1070 gives the user control over
the timing functions on the part. By connecting an external
capacitor between the TIMER Pin and V
EE
, the user can set the
UV/OV glitch filter time, t
FLT
, the power-on reset delay time,
t
POR
, the maximum current on time, t
ON
, the current limit time
out, t
OFF
, and the continuous short circuit time before latched
shutdown, t
SHORT
(see Table III). Note that all times are scaled
relative to each other and cannot be altered individually (without
changing the other times). The default values for these times are
selected by tying the TIMER Pin directly to V
EE
.
Table III. Timer Capacitor Values and Timing Values
C
TIMER
t
FLT
t
POR
t
LIMITON
t
PWMOFF
t
SHORT
(pF)
(ms) (ms) (ms) (ms) (ms)
220
0.58 0.58 4.8 150 1000
330
0.85 0.85 7.1 230 1400
470
1.21 1.21 9.9 320 2000
Tied to V
EE
1.55 1.55 12.8 410 2600
680
1.74 1.74 14.2 450 2800
1000
2.54 2.54 20.8 660 4100
2200
5.64 5.64 46.2 1465 9113
Table I. I
LOAD(MAX)
, I
LIMIT(MIN)
, and I
LIMIT(MAX)
for Different Values of R
SENSE
Table II. Minimum and Maximum Allowable Operating
Voltages for Different Values of R
DROP
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