
ADM1072
–7–
Rev. PrE 1/02
FUNCT IONAL DESCRIPT ION
T he ADM1072 is a dual, logic-controlled P-channel switch.
Each channel of the ADM1072 comprises two P-channel
switches. T he source of one switch is connected to the
“MAIN_IN” input pins and can switch up to 1A. T he second
switch is conected to the “ST BY_IN” pins and can switch up to
200mA. T he device is rated to provide 500mA continuously in
full power mode and 100mA continuously in ST BY mode. T he
ST BY_IN inputs also provide the power for the chip circuitry
and so must be connected to a supply at all times.
When ST BY is low the MAIN switch is active and when ST BY
is high the Standby switch is active.
Each channel is individually controlled by an active-low logic
input
(pin 11) and
(pin 10). When either
is low, the internal circuitry of the ADM1072 is powered
up and the output of the corresponding current-limit amplifier
is low, providing gate drive to the switching FET , thus turning
it on. When both
inputs are high, the internal circuitry is
powered down and the current consumption is typically 10nA.
It should be noted that the ADM1072 is not a bi-directional
switch, so V
IN
must always be higher than V
OUT
.
T ABLE 1. T ruth T able for
ST BY
or
,
and ST BY
Channel 1
Channel 2
0
0
0
500mA
500mA
0
0
1
100mA
100mA
0
1
0
500mA
OFF
0
1
1
100mA
OFF
1
0
0
OFF
500mA
1
0
1
OFF
100mA
1
1
X
BOT H SHUT DOWN
X = don’t care
CURRENT LIMIT
When either the Main or Standby switch is turned on a smaller
mirror switch passes a proportionate current equal to I
OUT
/
1000. T he mirror amplifier maintains this relationship by
keeping the drain of the mirror FET at the same voltage as the
main FET , and drives the mirror current through an internal
current-limit resistor, which is connected between the non-
inverting input of the current limit amplifier and ground. An
on-chip bandgap reference of 1.24V is connected to the
inverting input of the current-limit amplifier. When the load
current exceeds the preset limit, the voltage across the current-
limit resistor exceeds 1.24V and the output voltage of the cur-
rent-limit amplifier rises, reducing the gate drive to the FET s.
By selecting between the Standby and Main FET s and their
associated mirror FET s, the ST BY input allows the two differ-
ent values of current limit specified by USB2.0 to be selected.
T his feature is particularly useful when driving USB peripherals
from a host system such as a PC that can go into a power-
saving mode, since it limits the current that the peripherals can
attempt to draw from the host power supply.
SHORT -CIRCUIT PROT ECT ION
T he proportional relationship between the main FET and the
mirror FET is only maintained down to an output voltage of
about 1.6V. Below this voltage the output current is limited to
approximately 1.2 x I
LIMIT
.
In the event of a high dV/dt across the switching FET during a
short-circuit, the switch will turn off and disconnect the input
from the output. T he switch is then turned on slowly with the
current limited to the short-circuit value.
T HERMAL SHUT DOWN
T he thermal shutdown operates when the die temperature
exceeds +150
o
C, turning off both channels. T he thermal shut-
down circuit has built-in hysteresis of 10
o
C, so the switch will
not turn on again until the die temperature falls to +140
o
C. If
the fault condition is not removed, the switch will pulse on and
off as the temperature cycles between these limits.
UNDERVOLT AGE LOCK OUT
T he undervoltage sensor monitors the input supply voltage (ie)
the voltage on ST BY_IN. T he outputs will not turn on until
the supply voltage is sufficient for the chip circuits to operate
reliably. Undervoltage lockout occurs at between 2.0 and 2.6V.
OUT PUT S
T he ADM1072 has active-low fault outputs for each channel,
(pin 6) and
(pin 7). If the current limit is
exceeded for greater than 10mS, the corresponding
output will pull low. If the thermal shutdown is activated, both
outputs will pull low. T he
and require a pullup resistor of between 10k and 100k .
Several
outputs may be wire-OR’d to form a common
interrupt line, as shown in Figure 17 or
wire-OR’d to an existing interrupt line that has a resistive pullup.
outputs are open-drain
outputs may be
ADM1072
FLT1
FLT2
R
PULLUP
V
PULLUP
INT
ADM1072
FLT1
FLT2
ADM1072
FLT1
FLT2
Figure 17. Wire Or’ing FAULT Outputs
During startup, the FLT output goes low for the turn-on time.