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參數資料
型號: ADM207EAR
廠商: ANALOG DEVICES INC
元件分類: 通用總線功能
英文描述: 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors
中文描述: TRIPLE LINE TRANSCEIVER, PDSO24
封裝: MS-013AD, SOIC-24
文件頁數: 10/16頁
文件大小: 204K
代理商: ADM207EAR
ADM206E/ADM207E/ADM208E/ADM211E/ADM213E
REV. B
–10–
new generation modem standards which requires data rates of
200 kb/s. The slew rate is internally controlled to less than 30 V/
μ
s
in order to minimize EMI interference.
t
DR
3V
0V
EN
INPUT
VOH
VOL
RECEIVER
OUTPUT
VOH –0.1V
VOL +0.1V
NOTE:
EN IS THE COMPLEMENT OF
EN
FOR THE ADM213E
Figure 22. Receiver-Disable Timing
t
ER
3V
0V
EN
INPUT
RECEIVER
OUTPUT
+3.5V
+0.8V
NOTE:
EN IS THE COMPLEMENT OF
EN
FOR THE ADM213E
Figure 23. Receiver Enable Timing
ESD/EFT Transient Protection Scheme
The ADM2xxE uses protective clamping structures on all inputs
and outputs which clamps the voltage to a safe level and dissi-
pates the energy present in ESD (Electrostatic) and EFT (Elec-
trical Fast Transients) discharges. A simplified schematic of the
protection structure is shown in Figures 24a and 24b. Each
input and output contains two back-to-back high speed clamp-
ing diodes. During normal operation with maximum RS-232
signal levels, the diodes have no affect as one or the other is
reverse biased depending on the polarity of the signal. If how-
ever the voltage exceeds about
±
50 V, reverse breakdown occurs
and the voltage is clamped at this level. The diodes are large p-n
junctions which are designed to handle the instantaneous cur-
rent surge which can exceed several amperes.
The transmitter outputs and receiver inputs have a similar pro-
tection structure. The receiver inputs can also dissipate some of
the energy through the internal 5 k
resistor to GND as well as
through the protection diodes.
The protection structure achieves ESD protection up to
±
15 kV and EFT protection up to
±
2 kV on all RS-232 I-O
lines. The methods used to test the protection scheme are dis-
cussed later.
R
IN
RX
D1
D2
RECEIVER
INPUT
R1
Figure 24a. Receiver Input Protection Scheme
RX
D1
D2
TRANSMITTER
OUTPUT
T
OUT
Figure 24b. Transmitter Output Protection Scheme
ESD TESTING (IEC1000-4-2)
IEC1000-4-2 (previously 801-2) specifies compliance testing
using two coupling methods, contact discharge and air-gap
discharge. Contact discharge calls for a direct connection to the
unit being tested. Air-gap discharge uses a higher test voltage
but does not make direct contact with the unit under test. With
air discharge, the discharge gun is moved towards the unit un-
der test developing an arc across the air gap, hence the term air-
discharge. This method is influenced by humidity, temperature,
barometric pressure, distance and rate of closure of the discharge
gun. The contact-discharge method while less realistic is more
repeatable and is gaining acceptance in preference to the air-gap
method.
Although very little energy is contained within an ESD pulse,
the extremely fast rise time coupled with high voltages can cause
failures in unprotected semiconductors. Catastrophic destruc-
tion can occur immediately as a result of arcing or heating. Even
if catastrophic failure does not occur immediately, the device
may suffer from parametric degradation which may result in
degraded performance. The cumulative effects of continuous
exposure can eventually lead to complete failure.
I-O lines are particularly vulnerable to ESD damage. Simply
touching or plugging in an I-O cable can result in a static dis-
charge that can damage or completely destroy the interface
product connected to the I-O port. Traditional ESD test meth-
ods such as the MIL-STD-883B method 3015.7 do not fully
test a products susceptibility to this type of discharge. This test
was intended to test a products susceptibility to ESD damage
during handling. Each pin is tested with respect to all other
pins. There are some important differences between the tradi-
tional test and the IEC test:
(a) The IEC test is much more stringent in terms of discharge
(
energy. The peak current injected is over four times greater.
(b) The current rise time is significantly faster in the IEC test.
(c) The IEC test is carried out while power is applied to the device.
It is possible that the ESD discharge could induce latch-up in the
device under test. This test therefore is more representative of a
real-world I-O discharge where the equipment is operating nor-
mally with power applied. For maximum peace of mind however,
both tests should be performed, therefore, ensuring maximum
protection both during handling and later during field service.
相關PDF資料
PDF描述
ADM208 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors
ADM211E 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors
ADM211EAR 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors
ADM213E 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors
ADM213EAR 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors
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參數描述
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