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參數(shù)資料
型號(hào): ADM3088AR
廠商: ANALOG DEVICES INC
元件分類: 通用總線功能
英文描述: High-Speed (10Mbps), Fail-Safe, RS-485/RS-422 Transceivers with Slew-Rate-Limiting and 5kV ESD Protection
中文描述: LINE TRANSCEIVER, PDSO8
封裝: SO-8
文件頁(yè)數(shù): 6/14頁(yè)
文件大小: 316K
代理商: ADM3088AR
ADM3082/ADM3085/ADM3088
ADM3082/ADM3085/ADM3088 SPECIFICATIONS (continued)
SWITCHING CHARACTERISTICS—ADM3088
(V
CC
= +5V ±5%, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V
CC
= +5V and T
A
= +25°C.) (Note 1)
–6–
PRELIMINARY TECHNICAL DATA
Parameter
Min
Typ
Max
Units
Test Conditions/Comments
Driver Input-to-Output, t
DPLH
Driver Input-to-Output, t
DPHL
34
34
60
60
ns
ns
Figures 2 and 5, R
DIFF
= 54
V
,
C
L1
= C
L2
= 100pF
Driver Output Skew,|t
DPLH
-t
DPHL
|, t
DSKEW
–2.5
±10
ns
Figures 2 and 5, R
DIFF
= 54
V
,
C
L1
= C
L2
= 100pF
Driver Rise or Fall Time, tDR, tDF
14
25
ns
Figures 7 and 9, R
DIFF
= 54
V
,
C
L1
= C
L2
= 100pF
Maximum Data Rate, f
MAX
10
Mbps
Driver Enable to Output High, t
DZH
150
ns
Figures 5 and 6, C
L
= 100pF,
S2 closed
Driver Enable to Output Low, t
DZL
150
ns
Figures 5 and 6, C
L
= 100pF,
S1 closed
Driver Disable Time from Low, t
DLZ
100
ns
Figures 5 and 6, C
L
= l5pF,
S1 closed
Driver Disable Time from High, t
DHZ
100
ns
Figures 5 and 6, C
L
= l5pF,
S2 closed
Receiver Input-to-Output, t
RPLH
, t
RPHL
106
150
ns
Figure 7; |V
ID
|
$
2.0V;
rise and fall time of V
ID
#
l5ns
DifferentialReceiver Skew, t
RSKD
|t
RPLH
– t
RPHL
|
0
±10
ns
Figures 7; |V
ID
|
$
2.0V;
rise and fall time of V
ID
#
l5ns
Receiver Enable to Output Low, t
RZL
20
50
ns
Figures 7 and 8, C
L
= 100pF,
S1 closed
Receiver Enable to Output High, t
RZH
20
50
ns
Figures 7 and 8, C
L
= 100pF,
S2 closed
Receiver Disable Time from Low, t
RLZ
20
50
ns
Figures 7 and 8, C
L
= 100pF,
S1 closed
Receiver Disable Time from High, t
RHZ
20
50
ns
Figures 7 and 8, C
L
= 100pF,
S2 closed
Time to Shutdown, t
SHDN
50
200
600
ns
(Note 5)
Driver Enable from Shutdown
toOutput High, t
DZH(SHDN)
250
ns
Figures 5 and 6, C
L
= l5pF,
S2 closed
Driver Enable from Shutdown
to Output Low, t
DZL(SHDN)
250
ns
Figures 5 and 6, C
L
= l5pF,
S1 closed
Receiver Enable from Shutdown
to Output High, t
RZH(SHDN)
3500
ns
Figures 7 and 8, C
L
= 100pF,
S2 closed
Receiver Enable from Shutdown
to Output Low, t
RZL(SHDN)
3500
ns
Figures 7 and 8, C
L
= 100pF,
S1 closed
NOTES
5
The device is put into shutdown by bringing
RE
high and DE low. If the enable inputs are in this state for less than 50ns, the device is guaranteed not to enter shut-
down. If the enable inputs are in this state for at least 600ns, the device is guaranteed to have entered shutdown.
REV. PrA 02/02
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