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參數(shù)資料
| 型號(hào)： | ADM4850AR-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 5 V Slew-Rate Limited Half- and Full-Duplex RS-485/RS-422 Transceivers |
| 中文描述： | LINE TRANSCEIVER, PDSO8 |
| 封裝： | MS-012AA, SOIC-8 |
| 文件頁數(shù)： | 13/16頁 |
| 文件大小： | 438K |
| 代理商： | ADM4850AR-REEL7 |
ADM4850–ADM4857
HIGH RECEIVER INPUT IMPEDANCE
The input impedance of the ADM485x receivers is 96 k,
which is 8 times higher than the standard RS-485 unit load of
12 k. This 96 k impedance, enables a standard driver to
drive 32 unit loads or be connected to 256 ADM485x receivers.
An RS-485 bus, driven by a single standard driver, can be
connected to a combination of ADM485x and standard unit
load receivers, up to an equivalent of 32 standard unit loads.
Rev. 0 | Page 13 of 16
THREE-STATE BUS CONNECTION
The half-duplex parts have a driver enable (DE) pin that enables
the driver outputs when taken high, or puts the driver outputs
into a high impedance state when taken low. Similarly, the half-
duplex devices have an active-low receiver enable (RE) pin.
Taking this pin low enables the receiver, while taking it high
puts the receiver outputs into a high impedance state. This
allows several driver outputs to be connected to an RS-485 bus.
Note that only one driver should be enabled at a time, while
many receivers can be enabled.
SHUTDOWN MODE
The ADM4850–ADM4853 have a low power shutdown mode,
which is enabled by taking RE high and DE low. If shutdown
mode is not used, the fact that DE is active high and RE is active
low offers a convenient way of switching the device between
transmit and receive by tying DE and RE together.
The devices are guaranteed not to enter shutdown mode if DE
and RE are driven in this way. If DE is low and RE is high for
less than 50 ns, the device does not enter shutdown mode. If DE
is low and RE is high for less than 3000 ns, the device is
guaranteed to enter shutdown mode.
FAIL-SAFE OPERATION
The ADM4850–ADM4857 offer true fail-safe operation while
remaining fully compliant with the ±200 mV EIA/TIA-485
standard. A logic-high receiver output is generated when the
receiver inputs are shorted together or open-circuit, or when
they are connected to a terminated transmission line with all
drivers disabled. This is done by setting the receiver threshold
between 30 mV and 200 mV. If the differential receiver input
voltage (A-B) is greater than or equal to 30 mV, RO is logic
high. If A-B is less than or equal to 200 mV, RO is logic low. In
the case of a terminated bus with all transmitters disabled, the
receiver’s differential input voltage is pulled to 0 V by the
ADM485x’s internal circuitry, which results in a logic high with
30 mV minimum noise margin.
CURRENT LIMIT AND THERMAL SHUTDOWN
The ADM485x incorporates two protection mechanisms to
guard the drivers against short circuits, bus contention, or other
fault conditions. The first is a current-limiting output stage,
which protects the driver against short circuits over the entire
common-mode voltage range by limiting the output current to
approximately 70 mA. Under extreme fault conditions where
the current limit is not effective, a thermal shutdown circuit
puts the driver outputs into a high impedance state if the die
temperature exceeds 150°C, and does not turn them back on
until the temperature falls to 130°C.
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相關(guān)代理商/技術(shù)參數(shù) |
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| ADM4850ARZ | 功能描述:IC TXRX RS485/422 115KBPS 8-SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:98 系列:* |
| ADM4850ARZ-REEL7 | 功能描述:IC TXRX RS485/422 115KBPS 8SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:* 標(biāo)準(zhǔn)包裝:121 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):1/1 規(guī)程:RS422，RS485 電源電壓:3 V ~ 3.6 V 安裝類型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:10-DFN（3x3） 包裝:管件 |
| ADM4851 | 制造商:AD 制造商全稱:Analog Devices 功能描述:5 V Slew-Rate Limited Half- and Full-Duplex RS-485/RS-422 Transceivers |
| ADM4851ACP-REEL | 制造商:AD 制造商全稱:Analog Devices 功能描述:5 V Slew-Rate Limited Half- and Full-Duplex RS-485/RS-422 Transceivers |
| ADM4851ACP-REEL7 | 制造商:Analog Devices 功能描述: |
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