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參數(shù)資料
型號: ADM485
廠商: Analog Devices, Inc.
英文描述: +5 V Low Power EIA RS-485 Transceiver
中文描述: 5 V低功耗環(huán)境影響評估的RS - 485收發(fā)器
文件頁數(shù): 2/8頁
文件大小: 133K
代理商: ADM485
ADM485–SPECIFICATIONS
Parameter
Min
Typ
Max
Units
Test Conditions/Comments
DRIVER
Differential Output Voltage, V
OD
5.0
5.0
5.0
5.0
0.2
3
0.2
250
250
0.8
V
V
V
V
V
V
V
mA
mA
V
V
μ
A
R =
, Figure 1
V
CC
= 5 V, R = 50
(RS-422), Figure 1
R = 27
(RS-485), Figure 1
V
TST
= –7 V to +12 V, Figure 2
R = 27
or 50
, Figure 1
R = 27
or 50
, Figure 1
R = 27
or 50
–7 V
V
O
+12 V
–7 V
V
O
+12 V
2.0
1.5
1.5
V
OD3
|V
OD
| for Complementary Output States
Common-Mode Output Voltage V
OC
|V
OC
| for Complementary Output States
Output Short Circuit Current (V
OUT
= High)
Output Short Circuit Current (V
OUT
= Low)
CMOS Input Logic Threshold Low, V
INL
CMOS Input Logic Threshold High, V
INH
Logic Input Current (DE, DI)
35
35
2.0
±
1.0
RECEIVER
Differential Input Threshold Voltage, V
TH
Input Voltage Hysteresis,
V
TH
Input Resistance
Input Current (A, B)
–0.2
+0.2
V
mV
k
mA
mA
μ
A
V
V
mA
μ
A
–7 V
V
CM
+12 V
V
CM
= 0 V
–7 V
V
CM
+12 V
V
IN
= 12 V
V
IN
= –7 V
70
12
+1
–0.8
±
1
0.4
Logic Enable Input Current (
RE
)
CMOS Output Voltage Low, V
OL
CMOS Output Voltage High, V
OH
Short Circuit Output Current
Tristate Output Leakage Current
I
OUT
= +4.0 mA
I
OUT
= –4.0 mA
V
OUT
= GND or V
CC
0.4 V
V
OUT
+2.4 V
4.0
7
85
±
1.0
POWER SUPPLY CURRENT
I
CC
(Outputs Enabled)
I
CC
(Outputs Disabled)
1.35
0.7
2.2
1
mA
mA
Outputs Unloaded, Digital Inputs = GND or V
CC
Outputs Unloaded, Digital Inputs = GND or V
CC
Specifications subject to change without notice.
TIMING SPECIFICATIONS
Parameter
Min
Typ
Max
Units
Test Conditions/Comments
DRIVER
Propagation Delay Input to Output T
PLH
, T
PHL
Driver O/P to
O/P
T
SKEW
Driver Rise/Fall Time T
R
, T
F
Driver Enable to Output Valid
Driver Disable Timing
2
10
0
2
10
10
15
5
10
25
25
ns
ns
ns
ns
ns
R
L
Diff = 54
C
L1
= C
L2
= 100 pF, Figure 3
R
L
Diff = 54
C
L1
= C
L2
= 100 pF, Figure 3
R
L
Diff = 54
C
L1
= C
L2
= 100 pF, Figure 3
RECEIVER
Propagation Delay Input to Output T
PLH
, T
PHL
Skew |T
PLH
–T
PHL
|
Receiver Enable T
EN1
Receiver Disable T
EN2
18
25
0
15
15
40
5
25
25
ns
ns
ns
ns
C
L
= 15 pF, Figure 5
Figure 6
Figure 6
Specifications subject to change without notice.
REV. A
–2–
(V
CC
= +5 V 5%. All specifications T
MIN
to T
MAX
unless otherwise noted)
(V
CC
= +5 V 5%. All specifications T
MIN
to T
MAX
unless otherwise noted.)
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