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參數資料
| 型號： | ADM561JRZ-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Ultralow Power +3.3 V, RS-232 Notebook PC Serial Port Drivers/Receivers |
| 中文描述： | LINE TRANSCEIVER, PDSO28 |
| 封裝： | LEAD FREE, MO-013AE, SOIC-28 |
| 文件頁數： | 1/12頁 |
| 文件大小： | 186K |
| 代理商： | ADM561JRZ-REEL |
Ultralow Power +3.3 V, RS-232
Notebook PC Serial Port Drivers/Receivers
ADM560/ADM561
FEATURES
RS-232 compatible
Operates with 3 V or 5 V logic
Ultralow power CMOS: 1.3 mA operation
Low power shutdown: 0.2 μA
Suitable for serial port mice
116 kbps data rate
1 μF charge pump capacitors
Single +3 V to +3.6 V power supply
Two receivers active in shutdown (ADM560)
APPLICATIONS
Notebook computers
Peripherals
Modems
Printers
Battery-operated equipment
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2006 Analog Devices, Inc. All rights reserved.
www.analog.com
FUNCTIONAL BLOCK DIAGRAM
7
16
15
14
12
13
17
11
T1
2
T1
IN
T1
OUT
6
T2
3
T2
IN
T2
OUT
20
T3
1
T3
IN
T3
OUT
24
21
T4
28
T4
IN
T4
OUT
R1
9
R1
OUT
R1
IN
8
R2
4
R2
OUT
R2
IN
5
R3
27
R3
OUT
R3
IN
26
R4
23
R4
OUT
R4
IN
22
R5
18
25
R5
OUT
R5
IN
SHDN (ADM561)
19
10
C1+
C1–
C2+
V
CC
V+
V–
C2–
+
+
+
+
GND
+3.3V TO +6.6V
VOLTAGE
DOUBLER
+6VOLTAGE
INVERTER
0.1μF
C3
1μF
6.3V
1μF
10V
1μF
C4
1μF
10V
EIA/TIA-232
OUTPUTS
EIA/TIA-232
INPUTS
SHDN (ADM560)
ADM560/
ADM561
+3.3V INPUT
CMOS
INPUTS
CMOS
OUTPUTS
EN (ADM560)
EN (ADM561)
0
Figure 1.
GENERAL DESCRIPTION
The ADM560/ADM561 are four driver/five receiver interface
devices designed to meet the EIA-232 standard and operate with
a single +3.3 V power supply. The devices feature an on-board
dc-to-dc converter, eliminating the need for dual ±5 V power
supplies. This dc-to-dc converter contains a voltage doubler
and voltage inverter, both of which internally generate ±6.6 V
from the input +3.3 V power supply.
The ADM560 and the ADM561 consume only 5 mW making
them ideally suited for battery and other power-sensitive appli-
cations. A shutdown facility is also provided to reduce the power
to 0.66 μW.
The ADM560 contains active low shutdown and an active high
receiver enable signal. In shutdown mode, two receivers remain
active, thereby allowing monitoring of peripheral devices. This
feature allows the device to be shut down until a peripheral
device begins communication. The active receivers alert the
processor, and then take the ADM560 out of shutdown mode.
The ADM561 features active high shutdown and an active
low receiver enable. In this device, all receivers are disabled
in shutdown.
The ADM560/ADM561 are fabricated using CMOS technology
for minimal power consumption. They feature a high level of
over-voltage protection and latch-up immunity. The receiver
inputs can withstand up to ±25 V levels. The transmitter inputs
can be driven from either 3 V or 5 V logic levels. This allows
operation in mixed 3 V/5 V power supply systems.
The ADM560/ADM561 are packaged in a 28-lead SOIC and
a 28-lead SSOP package.
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