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參數資料
| 型號： | ADM690AQ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 電源管理 |
| 英文描述： | Microprocessor Supervisory Circuits |
| 中文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, CDIP8 |
| 封裝： | CERDIP-8 |
| 文件頁數： | 11/16頁 |
| 文件大小： | 199K |
| 代理商： | ADM690AQ |
ADM690–ADM695
REV. A
–11–
ADM69x
CE
IN
PFO
PFI
V
CC
FROM
μ
P I/O PIN
APPLIES TEST LOAD
TO BATTERY
LOW BATTERY
SIGNAL TO
μ
P I/O PIN
+5V INPUT
POWER
V
BATT
CE
OUT
BATTERY
20k
OPTIONAL
TEST LOAD
10M
10M
Figure 20. Monitoring the Battery Status
Alternate Watchdog Input Drive Circuits
T he watchdog feature can be enabled and disabled under pro-
gram control by driving WDI with a 3-state buffer (Figure 21a).
When three-stated, the WDI input will float thereby disabling
the watchdog timer.
WDI
ADM69x
WATCHDOG
STROBE
CONTROL
INPUT
Figure 21a. Programming the Watchdog Input
T his circuit is not entirely foolproof, and it is possible that a
software fault could erroneously 3-state the buffer. T his would
then prevent the ADM69x from detecting that the microproces-
sor is no longer operating correctly. In most cases a better
method is to extend the watchdog period rather than disabling
the watchdog. T his may be done under program control using
the circuit shown in Figure 21b. When the control input is high,
the OSC SEL pin is low and the watchdog timeout is set by the
external capacitor. A 0.01
μ
F capacitor sets a watchdog timeout
delay of 100 seconds. When the control input is low, the OSC
SEL pin is driven high, selecting the internal oscillator. T he
100 ms or the 1.6 s period is chosen, depending on which diode
in Figure 21b is used. With D1 inserted the internal timeout is
set at 100 ms, while with D2 inserted the timeout is set at 1.6 s.
OSC IN
OSC SEL
ADM69x
CONTROL
INPUT*
D1
D2
*LOW = INTERNAL TIMEOUT
HIGH = EXTERNAL TIMEOUT
Figure 21b. Programming the Watchdog Input
Replacing the Backup Battery
When changing the backup battery with system power on, spuri-
ous resets can occur when the battery is removed. T his occurs
because the leakage current flowing out of the V
BAT T
pin will
charge up the stray capacitance. If the voltage on V
BAT T
reaches
within 50 mV of V
CC
, a reset pulse is generated.
If spurious resets during battery replacement are acceptable,
then no action is required. If not, then one of the following
solutions should be considered:
1. A capacitor from V
BAT T
to GND. T his gives time while the
capacitor is charging up to replace the battery. T he leakage
current will charge up the external capacitor towards the V
CC
level. T he time taken is related to the charging current, the
size of external capacitor and the voltage differential between
the capacitor and the charging voltage supply.
t
=
C
EX T
×
V
DIFF
/
I
T he maximum leakage (charging) current is 1
μ
A over tem-
perature and V
DIFF
= V
CC
–V
BAT T
. T herefore, the capacitor
size should be chosen such that sufficient time is available to
make the battery replacement.
C
EX T
=
T
REQD
(1
μ
A
/(
V
CC
–
V
BATT
))
If a replacement time of 5 seconds is allowed and assuming a
V
CC
of 4.5 V and a V
BAT T
of 3 V
C
EX T
=
3.33
μ
F
ADM69x
V
BATT
BATTERY
C
EXT
Figure 22a. Preventing Spurious RESETS During
Battery Replacement
2. A resistor from V
BAT T
to GND. T his will prevent the voltage
on V
BAT T
from rising to within 50 mV of V
CC
during battery
replacement.
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| ADM6918XABT1 | 功能描述:IC SWITCH CNTRLR 10/100 128FQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
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