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參數(shù)資料
型號: ADM706SAR
廠商: ANALOG DEVICES INC
元件分類: 電源管理
英文描述: +3 V, Voltage Monitoring uP Supervisory Circuits
中文描述: 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8
封裝: MS-012AA, SOIC-8
文件頁數(shù): 5/8頁
文件大小: 143K
代理商: ADM706SAR
ADM705–ADM708
REV. B
–5–
Power-Fail Comparator
The power-fail comparator is an independent comparator that
may be used to monitor the input power supply. The comparator’s
inverting input is internally connected to a 1.25 V reference
voltage. The noninverting input is available at the PFI input.
This input may be used to monitor the input power supply via
a resistive divider network. When the voltage on the PFI input
drops below 1.25 V, the comparator output (
PFO
) goes low,
indicating a power failure. For early warning of power failure,
the comparator may be used to monitor the preregulator input
simply by choosing an appropriate resistive divider network.
The
PFO
output can be used to interrupt the processor so that
a shutdown procedure is implemented before the power is lost.
INPUT
POWER
R1
R2
POWER-FAIL
INPUT
1.25V
PFI
PFO
POWER-FAIL
OUTPUT
ADM70x
Figure 5. Power-Fail Comparator
Adding Hysteresis to the Power-Fail Comparator
For increased noise immunity, hysteresis may be added to the
power-fail comparator. Since the comparator circuit is non-
inverting, hysteresis can be added simply by connecting a
resistor between the
PFO
output and the PFI input as shown in
Figure 6. When
PFO
is low, resistor R3 sinks current from the
summing junction at the PFI pin. When
PFO
is high, resistor
R3 sources current into the PFI summing junction. This results
in differing trip levels for the comparator. Further noise immu-
nity may be achieved by connecting a capacitor between PFI
and GND.
7V TO 15V
INPUT POWER
TO P NMI
R3
5V
V
CC
R1
R2
1.25V
PFI
PFO
ADM70x
ADM663
5V
PFO
0V
0V
V
L
V
IN
V
H
Figure 6. Adding Hysteresis to the Power-Fail Comparator
V
R
R
1
R
R
R
V
R
R
+
V
RE
V
R
R
2
R
H
L
CC
MID
=
+
+
×
=
+
=
1 25 1
.
2
2
3
3
1
1 25
.
1
1 25
.
2
1 25
.
1 25
.
2
]
Valid
RESET
Below 1 V V
CC
The ADM70x family of products is guaranteed to provide a
valid reset level with V
CC
as low as 1 V; please refer to the Typi-
cal Performance Characteristics. As V
CC
drops below 1 V, the
internal transistor will not have sufficient drive to hold it ON so
the voltage on
RESET
will no longer be held at 0 V. A pull-down
resistor as shown in Figure 7 may be connected externally to
hold the line low if it is required.
ADM70x
GND
RESET
R1
Figure 7.
RESET
Valid Below 1 V
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