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參數(shù)資料
| 型號(hào)： | ADM708S |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | +3 V, Voltage Monitoring uP Supervisory Circuits |
| 中文描述： | 3伏，電壓的監(jiān)察監(jiān)控電路 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 129K |
| 代理商： | ADM708S |
REV. A
–5–
ADM706P/R/S/T, ADM708R/S/T
WATCHDOG
TRANSITION
DETECTOR
WATCHDOG
TIMER
1.25V
V
REF
*
WATCHDOG
INPUT (WDI)
POWER FAIL
INPUT (PFI)
POWER FAIL
OUTPUT (
PFO
)
WATCHDOG
OUTPUT(
WDO
)
RESET
,
(P = RESET)
*
VOLTAGE REFERENCE = 2.63V (P/R), 2.93V (S), 3.08V (T)
ADM706
RESET &
WATCHDOG
TIMEBASE
RESET
GENERATOR
MR
V
CC
70
m
A
V
CC
Figure 1. ADM706 Functional Block Diagram
1.25V
V
REF
*
POWER FAIL
INPUT (PFI)
POWER FAIL
OUTPUT (
PFO
)
RESET
*
VOLTAGE REFERENCE = 2.63V (R), 2.93V (S), 3.08V (T)
ADM708
RESET
GENERATOR
MR
V
CC
70
m
A
V
CC
RESET
Figure 2. ADM708 Functional Block Diagram
CIRCUIT INFORMATION
Power Fail Reset
The reset output provides a reset (
RESET
or RESET) output
signal to the Microprocessor whenever the V
CC
input is below
the reset threshold. The actual reset threshold voltage is depen-
dent on whether a P/R, S, or T suffix device is used. An internal
timer holds the reset output active for 200 ms after the voltage
on V
CC
rises above the threshold. This is intended as a power-on
reset signal for the microprocessor. It allows time for both the
power supply and the microprocessor to stabilize after power-
up. If a power supply brownout or interruption occurs, the reset
line is similarly activated and remains active for 200 ms after the
supply recovers. If another interruption occurs during an active
reset period, then the reset timeout period continues for an ad-
ditional 200 ms.
The reset output is guaranteed to remain valid with V
CC
as low
as 1 V. This ensures that the microprocessor is held in a stable
shutdown condition as the power supply starts up.
The ADM706P provides an active high reset (RESET) signal;
the ADM706R/S/T provides an active low (
RESET
) signal;
while the ADM708R/S/T provides both RESET and
RESET
.
Manual Reset
The manual reset input (
MR
) allows other reset sources such as
a manual reset switch to generate a processor reset. The input is
effectively debounced by the timeout period (200 ms typical).
The
MR
input is TTL/CMOS compatible so it may also be
driven by any logic reset output. If unused, the
MR
input may
be tied high or left floating.
V
CC
RESET
MR
WDO
VRT
VRT
t
RS
t
RS
MR
EXTERNALLY
DRIVEN LOW
NOTE: RESET = COMPLEMENT OF
RESET
Figure 3.
RESET
,
MR
and
WDO
Timing
Watchdog Timer (ADM706)
The watchdog timer circuit may be used to monitor the activity
of the microprocessor in order to check that it is not stalled in
an indefinite loop. An output line on the processor is used to
toggle the Watchdog Input (WDI) line. If this line is not toggled
within the timeout period (1.6 sec), the watchdog output
(
WDO
) is driven low. The
WDO
output may be connected to a
nonmaskable interrupt (NMI) on the processor. Therefore, if
the watchdog timer times out, an interrupt is generated. The in-
terrupt service routine should then be used to rectify the
problem.
The watchdog timer is cleared by either a high-to-low or by a
low-to-high transition on WDI. Pulses as narrow as 50 ns are
detected. The timer is also cleared by RESET/
RESET
going
active. Therefore the watchdog timeout period begins after reset
goes inactive.
When V
CC
falls below the reset threshold,
WDO
is forced low
whether or not the watchdog timer has timed out. Normally
this would generate an interrupt but it is overridden by RESET/
RESET
going active.
The watchdog monitor can be deactivated by floating the
Watchdog Input (WDI). The
WDO
output can now be used as
a low line output since it will only go low when V
CC
falls below
the reset threshold.
t
WP
t
WD
WDI
WDO
RESET
t
RS
RESET EXTERNALLY
TRIGGERED BY
MR
t
WD
t
WD
Figure 4. Watchdog Timing
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADM708R | +3 V, Voltage Monitoring uP Supervisory Circuits |
| ADM708RAN | ECONOLINE: REC3-S_DRW(Z)/H* - 3W DIP Package- 1kVDC Isolation- Wide Input 2:1 & 4:1- Regulated Output- 100% Burned In- UL94V-0 Package Material- Continuous Short Circiut Protection- Efficiency to 80% |
| ADM708RAR | +3 V, Voltage Monitoring uP Supervisory Circuits |
| ADM708SAN | +3 V, Voltage Monitoring uP Supervisory Circuits |
| ADM708SAR | +3 V, Voltage Monitoring uP Supervisory Circuits |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADM708SAN | 制造商:Analog Devices 功能描述:Processor Supervisor 2.93V 2.93V 8-Pin PDIP 制造商:Analog Devices 功能描述:PROCESSOR SUPERVISOR 2.93V 350UA 8PDIP - Rail/Tube 制造商:Rochester Electronics LLC 功能描述:RESET GENERATOR I.C. - Bulk |
| ADM708SANZ | 功能描述:IC SUPERVISOR MPU 2.93V WD 8DIP RoHS:是 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:400 系列:- 類型:備用電池電路 監(jiān)視電壓數(shù)目:1 輸出:開路漏極，推挽式 復(fù)位:高有效/低有效 復(fù)位超時(shí):最小為 35 ms 電壓 - 閥值:4.65V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC W 包裝:帶卷 (TR) 其它名稱:ADM691ARZ-REEL7TR |
| ADM708SAR | 功能描述:IC SUPERVISOR MPU 2.93 WD 8SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:400 系列:- 類型:備用電池電路 監(jiān)視電壓數(shù)目:1 輸出:開路漏極，推挽式 復(fù)位:高有效/低有效 復(fù)位超時(shí):最小為 35 ms 電壓 - 閥值:4.65V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC W 包裝:帶卷 (TR) 其它名稱:ADM691ARZ-REEL7TR |
| ADM708SAR-REEL | 功能描述:IC SUPERVISOR MPU 2.93V WD 8SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:400 系列:- 類型:備用電池電路 監(jiān)視電壓數(shù)目:1 輸出:開路漏極，推挽式 復(fù)位:高有效/低有效 復(fù)位超時(shí):最小為 35 ms 電壓 - 閥值:4.65V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC W 包裝:帶卷 (TR) 其它名稱:ADM691ARZ-REEL7TR |
| ADM708SARZ | 功能描述:IC SUPERVISOR MPU 2.93 WD 8SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:開路漏極，開路漏極 復(fù)位:高有效/低有效 復(fù)位超時(shí):最小為 250 ms 電壓 - 閥值:4.37V，4.62V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOIC 包裝:管件 產(chǎn)品目錄頁面:1337 (CN2011-ZH PDF) |
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