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參數資料
| 型號： | ADM811 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Battery Back-up Supervisor for Dual SRAM Banks 16-TSSOP -20 to 70 |
| 中文描述： | 微處理器監控電路4引腳SOT - 143 |
| 文件頁數： | 2/6頁 |
| 文件大小： | 83K |
| 代理商： | ADM811 |
–2–
REV. 0
ADM811/ADM812–SPECIFICATIONS
(V
CC
= Full Operating Range, T
A
= T
MIN
to T
MAX
, V
CC
typ = +5 V
for L/M, +3.3 V for T/S, +3 V for R Models unless otherwise noted)
P
arameter
Min
Typ
Max
Units
Test Conditions/Comments
SUPPLY
Voltage
1.0
1.2
5.5
V
V
μ
A
μ
A
T
A
= 0
°
C to +70
°
C
T
A
= –40
°
C to +85
°
C
V
CC
< +5.5 V, ADM81_L/M, I
OUT
= 0 A
V
CC
< +3.6 V, ADM81_R/S/T, I
OUT
= 0 A
Current
8
5
15
10
RESET VOLTAGE THRESHOLD
ADM81_L
ADM81_L
ADM81_M
ADM81_M
ADM81_T
ADM81_T
ADM81_S
ADM81_S
ADM81_R
ADM81_R
4.54
4.50
4.30
4.25
3.03
3.00
2.88
2.85
2.58
2.55
4.63
4.72
4.75
4.46
4.50
3.14
3.15
2.98
3.00
2.68
2.70
V
V
V
V
V
V
V
V
V
V
T
A
= +25
°
C
T
A
= –40
°
C to +85
°
C
T
A
= +25
°
C
T
A
= –40
°
C to +85
°
C
T
A
= +25
°
C
T
A
= –40
°
C to +85
°
C
T
A
= +25
°
C
T
A
= –40
°
C to +85
°
C
T
A
= +25
°
C
T
A
= –40
°
C to +85
°
C
4.38
3.08
2.93
2.63
RESET THRESHOLD
TEMPERATURE COEFFICIENT
30
ppm/
°
C
μ
s
μ
s
V
CC
TO RESET/
RESET
DELAY
40
20
V
OD
= 125 mV, ADM81_L/M
V
OD
= 125 mV, ADM81_R/S/T
RESET ACTIVE TIMEOUT PERIOD
140
300
560
700
ms
ms
V
CC
= V
TH(MAX)
(ADM811-3T Only)
MANUAL RESET
Minimum Pulsewidth
Glitch Immunity
RESET/
RESET
Propagation Delay
Pull-Up Resistance
The Manual Reset Circuit Will Act On
An Input Rising Above
An Input Falling Below
An Input Rising Above
An Input Falling Below
10
μ
s
ns
μ
s
k
100
0.5
20
10
30
2.3
V
V
V
V
V
CC
> V
TH(MAX),
ADM81_L/M
V
CC
> V
TH(MAX),
ADM81_L/M
V
CC
> V
TH(MAX),
ADM81_R/S/T
V
CC
> V
TH(MAX),
ADM81_R/S/T
0.8
0.7
×
V
CC
0.25
×
V
CC
RESET
Output Voltage
Low (ADM812R/S/T)
Low (ADM812L/M)
High (ADM812R/S/T/L/M)
Low (ADM811R/S/T)
Low (ADM811L/M)
Low (ADM811R/S/T/L/M)
High (ADM811R/S/T)
High (ADM811L/M)
0.3
0.4
V
V
V
V
V
V
V
V
V
CC
= V
TH(MAX)
, I
SINK
= 1.2 mA
V
CC
= V
TH(MAX)
, I
SINK
= 3.2 mA
1.8 V < V
CC
< V
TH(MIN)
, I
SOURCE
= 150
μ
A
V
CC
= V
TH(MIN)
, I
SINK
= 1.2 mA
V
CC
= V
TH(MIN)
, I
SINK
= 3.2 mA
V
CC
> 1.0 V, I
SINK
= 50
μ
A
V
CC
> V
TH(MAX)
, I
SOURCE
= 500
μ
A
V
CC
> V
TH(MAX)
, I
SOURCE
= 800
μ
A
0.8 V
CC
0.3
0.4
0.3
0.8 V
CC
V
CC
– 1.5
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
(Typical values are at T
A
= +25
°
C unless otherwise noted)
Terminal Voltage (With Respect to Ground)
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
All Other Inputs . . . . . . . . . . . . . . . . .–0.3 V to V
CC
+ 0.3 V
Input Current
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
MR
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Output Current
RESET
, RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Power Dissipation (T
A
= +70
°
C)
RT-4, SOT-143 . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mW
Derate by 4 mW/
°
C above +70
°
C
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 330
°
C/W
Operating Temperature Range . . . . . . . . . . . –40
°
C to +85
°
C
Storage Temperature Range . . . . . . . . . . . . –65
°
C to +160
°
C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . .+300
°
C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . .+215
°
C
Infrared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . . . . .+220
°
C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 kV
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum ratings
for extended periods of time may affect device reliability.
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