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參數資料
| 型號： | ADM824LYRT-R7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 電源管理 |
| 英文描述： | Supervisory Circuits with Watchdog and Manual Reset in 5-Lead SC70 and SOT-23 |
| 中文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO5 |
| 封裝： | MO-178AA, SOT-23, 5 PIN |
| 文件頁數： | 6/10頁 |
| 文件大小： | 180K |
| 代理商： | ADM824LYRT-R7 |
ADM823/ADM824/ADM825
Preliminary Technical Data
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Rev.PrB | Page 6 of 10
ADM823
TOP VIEW
(Not to Scale)
RESET
1
GND
2
MR
3
V
CC
WDI
5
4
0
Figure 2. ADM823 Pin Configuration
ADM824
TOP VIEW
(Not to Scale)
RESET
1
GND
2
RESET
3
V
CC
WDI
5
4
0
Figure 3. ADM824 Pin Configuration
ADM825
TOP VIEW
(Not to Scale)
RESET
1
GND
2
RESET
3
V
CC
MR
5
4
0
Figure 4. ADM825 Pin Configuration
Table 4. Pin Function Descriptions
Pin. No.
Mnemonic
1
RESET
2
GND
3
MR (ADM823)
Description
Push-Pull Active-Low Reset Output. Asserted whenever V
CC
is below the reset threshold, V
TH
.
Ground.
Manual Reset Input. This is an active-low input which, when forced low for at least 1μs, generates
a reset. It features a 52 k internal pull-up.
Active-High, Push-Pull Reset Output.
Watchdog Input. Generates a reset if the voltage on the pin remains low or high for the duration
of the watchdog timeout. The timer is cleared if a logic transition occurs on this pin or if a reset is
generated.
Manual Reset Input.
Power Supply Voltage Being Monitored.
4
RESET (ADM824/ADM825)
WDI (ADM823/ADM824)
5
MR (ADM825)
V
CC
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