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參數資料
型號: ADM8660AR
廠商: ANALOG DEVICES INC
元件分類: 穩壓器
英文描述: CMOS Switched-Capacitor Voltage Converters
中文描述: SWITCHED CAPACITOR CONVERTER, 120 kHz SWITCHING FREQ-MAX, PDSO8
封裝: MS-012AA, SOIC-8
文件頁數: 7/8頁
文件大小: 111K
代理商: ADM8660AR
ADM660/ADM8660
REV. A
–7–
T able II. ADM8660 Charge-Pump Frequency Selection
FC
OSC
Charge Pump
C1, C2
GND
V+
GND or V+
GND
Open
Open
Ext Cap
Ext CLK
25 kHz
120 kHz
See T ypical Characteristics
Ext CLK Frequency/2
10
μ
F
2.2
μ
F
INVERTED
NEGATIVE
OUTPUT
+1.5V TO +7V
INPUT
C1
C2
ADM660
ADM8660
V+
GND
OUT
LV
OSC
FC
CAP+
CAP–
CMOS GATE
CLK OSC
Figure 21. ADM660/ADM8660 External Oscillator
Voltage Doubling Configuration
Figure 22 shows the ADM660 configured to generate increased
output voltages. As in the inverting mode, only two external ca-
pacitors are required. T he doubling function is achieved by re-
versing some connections to the device. T he input voltage is
applied to the GND pin and V+ is used as the output. Input
voltages from 2.5 V to 7 V are allowable. In this configuration,
pins LV, OUT must be connected to GND.
T he unloaded output voltage in this configuration is 2 (V
IN
).
Output resistance and ripple are similar to the voltage inverting
configuration.
Note that the ADM8660 cannot be used in the voltage
doubling configuration.
DOUBLED
POSITIVE
OUTPUT
+2.5V
TO +7V
INPUT
10μF
10μF
ADM660
V+
GND
OUT
LV
OSC
FC
CAP+
CAP–
Figure 22. Voltage Doubler Configuration
Shutdown Input
T he ADM8660 contains a shutdown input that can be used to
disable the device and hence reduce the power consumption. A
logic high level on the SD input shuts the device down reducing
the quiescent current to 0.3
μ
A. During shutdown the output
voltage goes to 0 V. T herefore, ground referenced loads are
not powered during this state. When exiting shutdown it takes
several cycles (approximately 500
μ
s) for the charge pump to
reach its final value. If the shutdown function is not being used,
then SD should be hardwired to GND.
Capacitor Selection
T he optimum capacitor value selection depends the charge-
pump frequency. With 25 kHz selected, 10
μ
F capacitors are
recommended, while with 120 kHz selected, 2.2
μ
F capacitors
may be used. Other frequencies allow other capacitor values to
be used. For maximum efficiency in all cases, it is recommended
that capacitors with low ESR are used for the charge pump.
Low ESR capacitors give both the lowest output resistance and
lowest ripple voltage. High output resistance degrades the overall
power efficiency and causes voltage drops, especially at high
Inverting Negative Voltage Generator
Figures 19 and 20 show the ADM660/ADM8660 configured to
generate a negative output voltage. Input supply voltages from
1.5 V up to 7 V are allowable. For supply voltage less than 3 V,
LV must be connected to GND. T his bypasses the internal
regulator circuitry and gives best performance in low voltage
applications. With supply voltages greater than 3 V, LV may
be either connected to GND or left open. Leaving it open facili-
tates direct substitution for the ICL7660.
INVERTED
NEGATIVE
OUTPUT
+1.5V TO +7V
INPUT
C1
10μF
C2
10μF
ADM660
V+
GND
OUT
LV
OSC
FC
CAP+
CAP–
Figure 19. ADM660 Voltage Inverter Configuration
INVERTED
NEGATIVE
OUTPUT
+1.5V TO +7V
INPUT
C1
10μF
C2
10μF
ADM8660
V+
GND
OUT
LV
FC
CAP+
CAP–
SD
SHUTDOWN
CONTROL
Figure 20. ADM8660 Voltage Inverter Configuration
OSCILLAT OR FRE QUE NCY
T he internal charge-pump frequency may be selected to be
either 25 kHz or 120 kHz using the Frequency Control (FC)
input. With FC unconnected (ADM660) or connected to GND
(ADM8660), the internal charge pump runs at 25 kHz while, if
FC is connected to V+, the frequency is increased by a factor of
five. Increasing the frequency allows smaller capacitors to be
used for equivalent performance or, if the capacitor size is un-
changed, it results in lower output impedance and ripple.
If a charge-pump frequency other than the two fixed values is
desired, this is made possible by the OSC input, which can ei-
ther have a capacitor connected to it or be overdriven by an
external clock. Please refer to the T ypical Performance Charac-
teristics, which shows the variation in charge-pump frequency
versus capacitor size. T he charge-pump frequency is one-half
the oscillator frequency applied to the OSC pin.
If an external clock is used to overdrive the oscillator, its levels
should swing to within 100 mV of V+ and GND. A CMOS
driver is, therefore, suitable. When OSC is overdriven, FC has
no effect but LV must be grounded.
Note that overdriving is permitted only in the voltage
inverter configuration.
T able I. ADM660 Charge-Pump Frequency Selection
FC
OSC
Charge Pump
C1, C2
Open
V+
Open or V+
Open
Open
Open
Ext Cap
Ext CLK
25 kHz
120 kHz
See T ypical Characteristics
Ext CLK Frequency/2
10
μ
F
2.2
μ
F
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相關代理商/技術參數
參數描述
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