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參數資料
型號: ADM8697
廠商: Analog Devices, Inc.
英文描述: Microprocessor Supervisory Circuits(微處理器監(jiān)控電路)
中文描述: 微處理器監(jiān)控電路(微處理器監(jiān)控電路)
文件頁數: 2/12頁
文件大小: 172K
代理商: ADM8697
ADM8696/ADM8697–SPECIFICATIONS
P
arameter
Min
T yp
Max
Units
T est Conditions/Comments
V
CC
Operating Voltage Range
V
BAT T
Operating Voltage Range
3.0
2.0
5.5
V
CC
– 0 3
V
V
BAT T ERY BACK UP SWIT CHING (ADM8696)
V
OUT
Output Voltage
V
CC
– 0.005
V
CC
– 0.2
V
BAT T
– 0.005 V
– 0.002
V
CC
– 0.0025
V
CC
– 0.125
V
V
V
μ
A
μ
A
I
OUT
= 1 mA
I
OUT
100 mA
I
OUT
= 250
μ
A, V
CC
< V
BAT T
– 0.2 V
I
OUT
= 100 mA
V
= 0 V, V
= 2.8 V
5.5 V > V
CC
> V
BAT T
+ 0.2 V
V
in Battery Backup Mode
Supply Current (Excludes I
)
Supply Current in Battery Backup Mode
Battery Standby Current
(+ = Discharge, – = Charge)
Battery Switchover T hreshold
V
– V
Battery Switchover Hysteresis
BAT T ON Output Voltage
BAT T ON Output Short Circuit Current
115
0.4
200
1
–0.1
+0.02
μ
A
mV
mV
mV
V
mA
μ
A
70
50
20
Power-Up
Power-Down
0.3
I
= 3.2 mA
BAT T ON = V
OUT
= 2.4 V Sink Current
BAT T ON = V
OUT
, V
CC
= 0 V, Source Current
30
2.5
0.5
25
RESET AND WAT CHDOG T IMER
Low Line T hreshold (LL
IN
)
Reset T imeout Delay
Watchdog T imeout Period, Internal Oscillator
1.25
35
1.0
70
4032
960
50
100
1.3
50
1.6
100
4063
1011
1.35
70
2.25
140
4097
1025
V
ms
s
ms
Cycles
Cycles
ns
ns
ns
mV
V
V
V
V
V
V
V
μ
A
OSC SEL = HIGH
Long Period
Short Period
Long Period
Short Period
V
IL
= 0.8, V
IH
= 3.75 V, V
CC
= 5 V
V
IL
= 0.8, V
IH
= 3.5 V, V
CC
= 5 V
V
IL
= 0.8, V
IH
= 2.6 V, V
CC
= 3 V
I
SINK
= 10
μ
A, V
CC
= 1 V
I
SINK
= 400
μ
A, V
= 2 V, V
= 0 V
I
SINK
= 3.2 mA, 3 V < V
CC
< 5.5 V
I
SOURCE
= 1
μ
A, V
CC
= 5 V
I
SOURCE
= 1
μ
A, V
CC
= 3 V
I
SINK
= 3.2 mA,
I
SOURCE
= 1
μ
A, V
CC
= 5 V
I
SOURCE
= 1
μ
A, V
CC
= 3 V
V
CC
Watchdog T imeout Period, External Clock
Minimum WDI Input Pulse Width
100
4
0.1
0.1
RESET
Output Voltage @ V
= +1 V
RESET ,
RESET
Output Voltage
20
0.4
0.4
3.5
2.7
LOW LINE
,
WDO
Output Voltage
0.4
3.5
2.7
10
Output Short Circuit Source Current
WDI Input T hreshold
Logic Low
Logic High
1
25
0.8
V
V
V
μ
A
μ
A
3.5
V
CC
= 5 V
V
= 3 V
WD1 = V
OUT
, (V
CC
)
WD1 = 0 V
1.2
1
–1
WDI Input Current
10
–10
POWER FAIL DET ECT OR
PFI Input T hreshold
PFI–LL
IN
T hreshold Difference
PFI Input Current
LL
IN
Input Current
PFO
Output Voltage
1.2
–50
–25
–50
1.3
±
15
±
0.01
±
0.01
1.4
+50
+25
+50
0.4
V
mV
nA
nA
V
V
V
μ
A
I
SINK
= 3.2 mA
I
SOURCE
= 1
μ
A
I
= 1
μ
A, V
= 3 V
PFI = Low,
PFO
= 0 V
3.5
2.7
10
PFO
Short Circuit Source Current
1
25
CHIP ENABLE GAT ING (ADM8697)
CE
IN
T hreshold
0.8
V
V
V
μ
A
V
V
ns
ns
V
IL
V
IH
V
CC
= 3 V
3.0
1.2
3
CE
IN
Pull-Up Current
CE
OUT
Output Voltage
0.4
I
SINK
= 3.2 mA
I
SOURCE
= 800
μ
A
V
CC
= 5.0 V
V
CC
= 3.0 V
V
CC
– 0.5
CE
Propagation Delay
2
4
7
OSCILLAT OR
OSC IN Input Current
OSC SEL Input Pull-Up Current
OSC IN Frequency Range
OSC IN Frequency with Ext. Capacitor
±
2
5
μ
A
μ
A
kHz
kHz
0
500
OSC SEL = 0 V
OSC SEL = 0 V, C
OSC
= 47 pF
4
NOT E
1
WDI is a three-level input internally biased to 38% of V
CC
and has an input impedance of approximately 5 M
.
Specifications subject to change without notice.
REV. 0
–2–
(V
CC
= Full Operating Range, V
BATT
= +2.8 V, T
A
= T
MN
to T
MAX
unless otherwse noted.)
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相關代理商/技術參數
參數描述
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