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參數資料
| 型號： | ADP1073AR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 穩壓器 |
| 英文描述： | Circular Connector; MIL SPEC:MIL-DTL-38999 Series I; Body Material:Metal; Series:LJT; No. of Contacts:53; Connector Shell Size:23; Connecting Termination:Crimp; Circular Shell Style:Straight Plug; Body Style:Straight RoHS Compliant: No |
| 中文描述： | 0.4 A SWITCHING REGULATOR, 23 kHz SWITCHING FREQ-MAX, PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁數： | 11/16頁 |
| 文件大小： | 442K |
| 代理商： | ADP1073AR |
ADP1073
–11–
REV. 0
OSCILLATOR
V
IN
SW2
SW1
R
(EXTERNAL)
DRIVER
I
LIM
Q1
ADP1073
Q2
Q3
R1
80
(INTERNAL)
Figure 21. Current Limit Operation
Programming the Gain Block
The gain block of the ADP1073 can be used as a low battery
detector, error amplifier or linear post regulator. The gain block
consists of an op amp with PNP inputs and an open-collector
NPN output. The inverting input is internally connected to the
ADP1073’s 212 mV reference, while the noninverting input is
available at the SET pin. The NPN output transistor will sink
about 100
μ
A.
Figure 22a shows the gain block configured as a low-battery
monitor. Resistors R1 and R2 should be set to high values to
reduce quiescent current, but not so high that bias current in
the SET input causes large errors. A value of 100 k
for R2 is a
good compromise. The value for R1 is then calculated from the
formula:
R
1
=
V
LOBATT
212
mV
212
mV
R
2
where
V
LOBATT
is the desired low battery trip point. Since the
gain block output is an open-collector NPN, a pull-up resistor
should be connected to the positive logic power supply.
V
IN
+5V
GND
ADP1073
R1
AO
SET
R2
100k
V
TO
PROCESSOR
212mV
REF
V
BAT
R1 = R2
(
2V
)
V
LB
= BATTERY TRIP POINT
LB
Figure 22a. Setting the Low Battery Detector Trip Point
V
IN
+5V
GND
ADP1073
R1
AO
SET
R2
33k
V
47k
V
TO
PROCESSOR
212mV
REF
V
BAT
R3
1.6M
V
Figure 22b. Adding Hysteresis to the Low Battery Detector
The circuit of Figure 22a may produce multiple pulses when
approaching the trip point, due to noise coupled into the SET
input. To prevent multiple interrupts to the digital logic, hyster-
esis can be added to the circuit (Figure 22b). Resistor R
HYS
, with
a value of 1 M
to 10 M
, provides the hysteresis. The addi-
tion of R
HYS
will change the trip point slightly, so the new value
for R1 will be:
R
1
=
V
LOBATT
–212
mV
212
mV
R
2
–
V
L
–212
mV
R
L
+
R
HYS
where
V
L
is the logic power supply voltage,
R
L
is the pull-up
resistor and
R
HYS
creates the hysteresis.
The gain block can also be used as a control element to reduce
output ripple. The ADP3000 is normally recommended for low-
ripple applications, but its minimum input voltage is 2 V. The
gain-block technique using the ADP1073 can be useful for step-
up converters operating down to 1 V.
A step-up converter using this technique is shown in Figure 23.
This configuration uses the gain block to sense the output volt-
age and control the comparator. The result is that the compara-
tor hysteresis is reduced by the open loop gain of the gain block.
Output ripple can be reduced to only a few millivolts with this
technique, versus a typical value of 150 mV for a +5 V converter
using just the comparator. For best results, a large output
capacitor (1000
μ
F or more) should be specified. This tech-
nique can also be used for step-down or inverting applications,
but the ADP3000 is usually a more appropriate choice. See the
ADP3000 data sheet for further details.
D1
I
LIM
V
IN
SW1
FB
SW2
GND
ADP1073
L1
R1
C1
AO
R2
R3
680k
V
SET
V
BAT
V
OUT
V
OUT
=
(
R1
)
(
212mV
)
Figure 23. Using the Gain Block to Reduce Output Ripple
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ADP1073AR-12 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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| ADP1073AR-33 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Micropower DC.DC Converter Adjustable and Fixed 3.3 V, 5 V, 12 V |
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| ADP1074ARWZ | 功能描述:ISOLATED ACTIVE CLAMP FOR 制造商:analog devices inc. 系列:* 包裝:管件 零件狀態:在售 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商器件封裝:24-SOIC 標準包裝:31 |
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