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參數資料
型號: ADP3179
廠商: Analog Devices, Inc.
英文描述: 4-Bit Programmable Synchronous Buck Controllers
中文描述: 4位可編程同步降壓控制器
文件頁數: 10/16頁
文件大小: 231K
代理商: ADP3179
REV. A
–10–
ADP3159/ADP3179
Surface mount MOSFETs are preferred in CPU core converter
applications due to their ability to be handled by automatic
assembly equipment. The TO-263 package offers the power
handling of a TO-220 in a surface-mount package. However,
this package still needs adequate copper area on the PCB to
help move the heat away from the package.
The junction temperature for a given area of 2-ounce copper
can be approximated using:
T
assuming:
θ
JA
= 45
°
C/W for 0.5 in
2
θ
JA
= 36
°
C/W for 1 in
2
θ
JA
= 28
°
C/W for 2 in
2
For 1 in
2
of copper area attached to each transistor and an
ambient temperature of 50
°
C:
T
J
HSF
= (36
°
C/W
×
1.48
W
) + 50
°
C
= 103
°
C
T
J
LSF
= (36
°
C/W
×
1.08
W
) + 50
°
C
= 89
°
C
P
T
A
D
A
J
J
=
×
(
)
+
θ
(21)
All of the above-calculated junction temperatures are safely
below the 175
°
C maximum specified junction temperature of
the selected MOSFETs.
C
IN
Selection and Input Current di/dt Reduction
In continuous inductor-current mode, the source current of the
high-side MOSFET is approximately a square wave with a duty
ratio equal to V
OUT
/V
IN
and an amplitude of one-half of the
maximum output current. To prevent large voltage transients, a
low ESR input capacitor sized for the maximum rms current
must be used. The maximum rms capacitor current is given by:
I
I
D
D
A
A
C RMS
(
O
HSF
HSF
)
.
.
0 36
.
=
=
=
2
2
15
0 36
7 2
(22)
For a ZA-type capacitor with 1000
μ
F capacitance and 6.3 V
voltage rating, the ESR is 24 m
and the maximum allowable
ripple current at 100 kHz is 2 A. At 105
°
C, at least four such
capacitors must be connected in parallel to handle the calculated
ripple current. At 50
°
C ambient, however, a higher ripple cur-
rent can be tolerated, so three capacitors in parallel are adequate.
The ripple voltage across the three paralleled capacitors is:
To further reduce the effect of the ripple voltage on the system
supply voltage bus, and to reduce the input-current di/dt to
below the recommended maximum of 0.1 A/ms, an additional
small inductor (L > 1
μ
H @ 10 A) should be inserted between
the converter and the supply bus.
Feedback Compensation for Active Voltage Positioning
Optimized compensation of the ADP3159 allows the best pos-
sible containment of the peak-to-peak output voltage deviation.
Any practical switching power converter is inherently limited by
the inductor in its output current slew rate to a value much less
than the slew rate of the load. Therefore, any sudden change of
load current will initially flow through the output capacitors,
V
I
ESR
n
D
C
n
f
V
A
m
3
F
kHz
mV
C IN RIPPLE
(
)
O
C IN
(
C
HSF
C
IN
MAX
C IN RIPPLE
(
)
)
%
×
=
×
+
×
×
=
×
+
μ
15
24
36
3 1000
195
129
(23)
and this will produce an output voltage deviation equal to the
ESR of the output capacitor array times the load current change.
CH2
TEK RUN: 200kS/s SAMPLE
100mV
CH1
M 250 s
CH2
680mV
2
TRIG'D
Figure 4. Transient Response of the Circuit of Figure 3
0
E
0
2
OUTPUT CURRENT
A
10
20
30
40
50
60
70
80
90
100
4
6
8
10
12
14
16
18
20
Figure 5. Efficiency vs. Load Current of the Circuit
of Figure 3
To correctly implement active voltage positioning, the low fre-
quency output impedance (i.e., the output resistance) of the
converter should be made equal to the maximum ESR of the
output capacitor array. This can be achieved by having a single-
pole roll-off of the voltage gain of the g
m
error amplifier, where
the pole frequency coincides with the ESR zero of the output
capacitor. A gain with single-pole roll-off requires that the g
m
amplifier output pin be terminated by the parallel combination
of a resistor and capacitor. The required resistor value can be
calculated from the equation:
R
R
R
R
OGM
TOTAL
where:
n
R
g
R
m
E MAX
×
(
)
2 2
R
M
M
k
k
k
COMP
OGM
TOTAL
=
×
=
×
=
.
.
9 1
.
1
1
9 1
9 2
(24)
R
m
×
mmho
m
k
TOTAL
I
SENSE
=
×
=
×
5
=
.
.
25
4
9 1
(25)
In Equations 24 and 25,
R
OGM
is the internal resistance of the
g
m
amplifier,
n
I
is the division ratio from the output voltage to
signal of the g
m
amplifier to the PWM comparator, and
g
m
is the
transconductance of the g
m
amplifier itself.
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