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參數資料
型號: ADP3806JRU-12.6-RL
廠商: ANALOG DEVICES INC
元件分類: 電源管理
英文描述: High-Frequency Switch Mode Li-Ion Battery Charger
中文描述: 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO24
封裝: MO-153AD, TSSOP-24
文件頁數: 13/16頁
文件大?。?/td> 274K
代理商: ADP3806JRU-12.6-RL
REV. B
ADP3806
–13–
For an input voltage of 19 V and a 22
m
H inductance, the maxi-
mum rms current is 0.26 A. A typical 10
m
F or 22
m
F ceramic
capacitor is a good choice to absorb this current.
Input Capacitor Ripple
As is the case with a normal buck converter, the pulse current at
the input has a high rms component. Therefore, since the input
capacitor has to absorb this current ripple, it must have an
appropriate rms current rating. The maximum input rms cur-
rent is given by
(
h
where
h
is the estimated converter efficiency (approximately
90%, 0.9) and
P
BAT
is the maximum battery power consumed.
This is a worst-case calculation and, depending on total charge
time, the calculated number could be relaxed. Consult the
capacitor manufacturer for further technical information.
Decoupling the VCC Pin
It is a good idea to use an RC filter (R13 and C14) from the
input voltage to the IC both to filter out switching noise and to
supply bypass to the chip. During layout, this capacitor should
be placed as close to the IC as possible. Values between 0.1
m
F
and 2.2
m
F are recommended.
Current-Sense Filtering
During normal circuit operation, the current-sense signals can
have high frequency transients that need filtering to ensure
proper operation. In the case of the CS+ and CS– inputs, the
resistors (R3 and R4) are set to 249
W
while the filter capacitor
(C13) value is 22 nF. For the system current sense circuits,
common-mode filtering from SYS+ and SYS– to ground is
needed. 470 nF ceramic capacitors (C1, C2) with 2.2
W
resistors
(R1, R2) will often do. These time constants can be adjusted in
the laboratory if required but represent a good starting point.
I
P
D V
D
D
D
rms
BAT
IN
=
)
1–
(10)
MOSFET Selection
One of the features of the ADP3806 is that it allows use of a
high side NMOS switch instead of a more costly PMOS device.
The converter also uses synchronous rectification for optimal
efficiency. In order to use a high side NMOS, an internal boot-
strap regulator automatically generates a 7 V supply across C9.
Maximum output current determines the R
DS(ON)
requirement
for the two power MOSFETs. When the ADP3806 is operating
in continuous mode, the simplifying assumption can be made
that one of the two MOSFETs is always conducting the load
current. The power dissipation for each MOSFET is given by:
Upper MOS
(
Lower MOS
(
1
where
f
is the switching frequency and
T
SW
is the switch transi-
tion time, usually 10 ns. The first term accounts for conduction
losses while the second term estimates switching losses. Using
these equations and the manufacturer’s data sheets, the proper
device can be selected.
A Schottky diode, D1, in parallel with Q2 conducts only during
dead time between the two power MOSFETs. D1’s purpose is
to prevent the body diode of the lower N-channel MOSFET
from turning on, which could cost as much as 1% in efficiency.
One option is to use a combined MOSFET with the Schottky
diode in a single package; these integrated packages often work
better in practice. Examples are the IRF7807D2 and the Si4832.
P
R
I
D
V
I
D
T
f
DISS
DS ON
(
BAT
IN
BAT
SW
=
)
+
)
2
(11)
P
R
I
D
V
I
D
T
f
DISS
DS ON
(
BAT
IN
BAT
SW
=
)
+
)
1
2
(12)
相關PDF資料
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