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參數資料
型號: ADS-944MM
廠商: Electronic Theatre Controls, Inc.
元件分類: 串行ADC
英文描述: 14-Bit, 5MHz Sampling A/D Converters
中文描述: 14位,5MHz的采樣A / D轉換器
文件頁數: 4/8頁
文件大小: 172K
代理商: ADS-944MM
ADS -944
4
For the ADS-944, offset adjusting is normally accomplished at
the point where the MSB is a 1 and all other output bits are 0's
and the LSB just changes from a 0 to a 1. This digital output
transition ideally occurs when the applied analog input is
+ LSB (+76.3μV).
Gain adjusting is accomplished when all bits are 1's and the
LSB just changes from a 1 to a 0. This transition ideally
occurs when the analog input is at +full scale minus 1 LSB's
(+1.249771) .
Note: Due to inherent system noise, the averaging of several
conversions may be needed to accurately adjust both offset
and gain to 1LSB of accuracy.
Zero/Offset Adjust Procedure
1. Apply a train of pulses to the START CONVERT input
(pin 32) so the converter is continuously converting.
2. Apply +76.3μV to the ANALOG INPUT (pin 3).
3. Adjust the offset potentiometer until the output bits are
10 0000 0000 0000 and the LSB flickers between 0 and 1
with pin 8 tied low (offset binary) or between 01 1111 1111
1111 and 01 1111 1111 1110 with pin 8 tied high
(complementary offset binary).
4. Two's complement coding requires using BIT 1 (MSB)
(pin 31). With pin 8 tied low, adjust the trimpot until the
code flickers between 00 0000 0000 0000 and 00 0000
0000 0001.
Gain Adjust Procedure
1. Apply +1.249771V to the ANALOG INPUT (pin 3).
2. Adjust the gain potentiometer until all output bits are 1's and
the LSB flickers between 1 and 0 with pin 8 tied low (offset
binary) or until all bits are 0's and the LSB flickers between
1 and 0 with pin 8 tied high (complementary offset binary).
3. Two's complement coding requires using pin 31. With pin 8
tied low, adjust the gain trimpot until the output code flickers
equally between 01 1111 1111 1110 and 01 1111 1111 1111.
4. To confirm proper operation of the device, vary the applied
input voltage to obtain the output coding listed in Table 1.
TECHNICAL NOTES CONT.
5. Applying a start convert pulse while a conversion is in
progress (EOC = logic "1") initiates a new and inaccurate
conversion cycle. Data for the interrupted and subsequent
conversions will be invalid.
6. A passive bandpass filter is used at the input of the A/D for
all production testing.
7. Though the ADS-944's digital outputs are capable of
driving multiple LSTTL or HCT loads, we recommend the
output bits and the EOC line each drive only a single gate.
These gates should be located as close to the unit as
possible. If they can not, 33
resistors placed in series
with each output can aid in isolating pc run inductances.
The ADS-944 digital outputs should not be connected
directly to noisy digital busses.
8. Do not enable/disable or complement the output bits during
the conversion process (from the falling edge of START
CONVERT to the falling edge of EOC).
CALIBRATION PROCEDURE
(Refer to Figure 2 and Table 1)
Note: Connect pin 5 to ANALOG GROUND (pin 6) for
operation without zero/offset adjustment. Connect pin 7 to
ANALOG GROUND (pin 6) for operation without gain
adjustment.
Any offset and/or gain calibration procedures should not be
implemented until devices are fully warmed up. To avoid
interaction, offset must be adjusted before gain. The ranges of
adjustment for the circuit in Figure 2 are guaranteed to
compensate for the ADS-944's initial accuracy errors and may
not be able to compensate for additional system errors.
A/D converters are calibrated by positioning their digital
outputs exactly on the transition point between two adjacent
digital output codes. This can be accomplished by connecting
LED's to the digital outputs and adjusting until certain LED's
"flicker" equally between on and off. Other approaches
employ digital comparators or microcontrollers to detect when
the outputs change from one code to the next.
Figure 2. ADS-944
Connection Diagram
ADS-944
20k
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
7
16
9
3
BIT 1 (MSB)
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
BIT 13
BIT 14 (LSB)
OVERFLOW
EOC
OUTPUT ENABLE
ANALOG INPUT
ANALOG
DIGITAL
SUPPLY
10
15
OFFSET
ADJUST
5
0.1μF
4.7μF
4, 6
14
0.1μF
4.7μF
1
+
+
–5.2V
+5V
32
START CONVERT
2
COMP. BITS
0.1μF
4.7μF
0.1μF
4.7μF
+
+
–5.2V
+5V
2
0.1μF
4.7μF
11
13
0.1μF
4.7μF
12
+
+
–15V
+15V
DIGITAL
ANALOG
SUPPLY
0.1μF
7
GAIN
ADJUST
20k
–15V
+15V
–15V
+15V
相關PDF資料
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