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參數(shù)資料
型號: ADSP-21065LKCA-264
廠商: ANALOG DEVICES INC
元件分類: 數(shù)字信號處理
英文描述: DSP Microcomputer
中文描述: 32-BIT, 33.33 MHz, OTHER DSP, PBGA196
封裝: CHIP SCALE, MS-034AAE-1, BGA-196
文件頁數(shù): 11/44頁
文件大小: 331K
代理商: ADSP-21065LKCA-264
REV. B
ADSP-21065L
–11–
The BTMS, BTCK,
BTRST
and BTDI signals are provided so
that the test access port can also be used for board-level testing.
When the connector is not being used for emulation, place
jumpers between the Bxxx pins and the xxx pins. If you are not
going to use the test access port for board testing, tie
BTRST
to GND and tie or pull-up BTCK to V
DD
.
The
TRST
pin must
be asserted after power-up (through
BTRST
on the connector)
or held low for proper operation of the ADSP-2106x. None of
the Bxxx pins (Pins 5, 7, 9, 11) are connected on the EZ-ICE
probe.
The JTAG signals are terminated on the EZ-ICE probe as follows:
Signal
Termination
Driven through 22
resistor (16 mA driver)
Driven at 10 MHz through 22
resistor
(16 mA driver)
Driven through 22
resistor (16 mA driver)
(pulled up by on-chip 20 k
resistor)
Driven by 22
resistor (16 mA driver)
One TTL load, Split Termination (160/220)
One TTL load, Split Termination (160/220).
(Caution: Do not connect to CLKIN if
internal XTAL oscillator is used.)
Active Low 4.7 k
pull-up resistor, one TTL
load (open-drain output from ADSP-2106xs)
TMS
TCK
TRST
*
TDI
TDO
CLKIN
EMU
*
TRST
is driven low until the EZ-ICE probe is turned on by the emulator at
software start-up. After software start-up,
TRST
is driven high.
Connecting CLKIN to Pin 4 of the EZ-ICE header is optional.
The emulator only uses CLKIN when directed to perform op-
erations such as starting, stopping, and single-stepping two
ADSP-21065Ls in a synchronous manner. If you do not need
these operations to occur synchronously on the two processors,
simply tie Pin 4 of the EZ-ICE header to ground.
For systems which use the internal clock generator and an exter-
nal discrete crystal, do not directly connect the CLKIN pin to
the JTAG probe. This will load the oscillator circuit and possi-
bly cause it to fail to oscillate. Instead the JTAG probe’s
CLKIN can be driven by the XTAL pin through a high imped-
ance buffer.
If synchronous multiprocessor operations are needed and CLKIN
is connected, clock skew between multiple ADSP-2106x proces-
sors and the CLKIN pin on the EZ-ICE header must be mini-
mal. If the skew is too large, synchronous operations may be off
by one cycle between processors. For synchronous multiproces-
sor operation TCK, TMS, CLKIN and
EMU
should be treated
as critical signals in terms of skew, and should be laid out as
short as possible on your board.
If synchronous multiprocessor operations are not needed (i.e.,
CLKIN is not connected), just use appropriate parallel termina-
tion on TCK and TMS. TDI, TDO,
EMU
and
TRST
are not
critical signals in terms of skew.
For Complete information on the SHARC EZ-ICE, see the
ADSP-21000 Family
J
TAG EZ-ICE User’s Guide and Reference
.
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