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參數資料
| 型號： | ADSP-2161KP-66 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數字信號處理 |
| 英文描述： | DSP Microcomputers with ROM |
| 中文描述： | 24-BIT, 16.67 MHz, OTHER DSP, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數： | 19/39頁 |
| 文件大小： | 243K |
| 代理商： | ADSP-2161KP-66 |
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REV. 0
ADSP-216x
–19–
POWER DISSIPATION EXAMPLE
To determine total power dissipation in a specific application,
the following equation should be applied for each output:
C
×
V
DD
2
×
f
C
= load capacitance,
f
= output switching frequency.
Example:
In an ADSP-2162 application where external data memory is
used and no other outputs are active, power dissipation is calcu-
lated as follows:
Assumptions:
External data memory is accessed every cycle with 50% of the
address pins switching.
External data memory writes occur every other cycle with
50% of the data pins switching.
Each address and data pin has a 10 pF total load at the pin.
The application operates at V
DD
= 3.3 V and t
CK
= 100 ns.
Total Power Dissipation
=
P
INT
+
(C
×
V
DD2
×
f
)
P
INT
= internal power dissipation (from Figure 15).
(
C
×
V
DD2
×
f
) is calculated for each output:
# of
Pins
3
C
Output
3
V
DD2
3
f
Address,
DMS
8
Data,
WR
RD
CLKOUT
×
10 pF
×
3.3
2
V
×
10 MHz = 8.71 mW
×
10 pF
×
3.3
2
V
×
5 MHz
×
10 pF
×
3.3
2
V
×
5 MHz
×
10 pF
×
3.3
2
V
×
10 MHz = 1.09 mW
9
1
1
= 4.90 mW
= 0.55 mW
15.25 mW
Total power dissipation for this example = P
INT
+ 15.25 mW.
ENVIRONMENTAL CONDITIONS
Ambient Temperature Rating:
T
AMB
= T
CASE
– (PD
×
θ
CA
)
T
CASE
= Case Temperature in
°
C
PD = Power Dissipation in W
θ
CA
= Thermal Resistance (Case-to-Ambient)
θ
JA
= Thermal Resistance (Junction-to-Ambient)
θ
JC
= Thermal Resistance (Junction-to-Case)
Package
u
JA
60
°
C/W
u
JC
18
°
C/W
u
CA
42
°
C/W
MQFP
ADSP-2162/ADSP-2164/ADSP-2166
CAPACITIVE LOADING
Figures 16 and 17 show capacitive loading characteristics for
the ADSP-2162 and ADSP-2164.
C
L
– pF
R
00
175
25
50
150
5
V
DD
= 3.0V
30
20
100
125
75
35
25
15
10
Figure 16. Typical Output Rise Time vs. Load Capaci-
tance, C
L
(at Maximum Ambient Operating Temperature)
C
L
– pF
R
–40
175
25
50
150
V
DD
= 3.0V
100
125
75
–2
NOMINAL
2
4
6
8
10
Figure 17. Typical Output Valid Delay or Hold vs. Load
Capacitance, C
L
(at Maximum Ambient Operating
Temperature)
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ADSP-2161KP-662 | 制造商:AD 制造商全稱:Analog Devices 功能描述:ADSP-2100 Family DSP Microcomputers |
| ADSP-2161KS-66 | 制造商:AD 制造商全稱:Analog Devices 功能描述:ADSP-2100 Family DSP Microcomputers |
| ADSP-2161KS-662 | 制造商:AD 制造商全稱:Analog Devices 功能描述:ADSP-2100 Family DSP Microcomputers |
| ADSP-2161Z-610311 | 制造商:Analog Devices 功能描述: |
| ADSP-2162 | 制造商:AD 制造商全稱:Analog Devices 功能描述:ADSP-2100 Family DSP Microcomputers |
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