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參數資料
| 型號： | ADSP-2185LKST-133 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數字信號處理 |
| 英文描述： | DSP Microcomputer |
| 中文描述： | 24-BIT, 26.3 MHz, OTHER DSP, PQFP100 |
| 封裝： | MS-026BED, LQFP-100 |
| 文件頁數： | 1/31頁 |
| 文件大?。?/td> | 223K |
| 代理商： | ADSP-2185LKST-133 |
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a
DSP Microcomputer
ADSP-2185L
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
ICE-Port is a trademark of Analog Devices, Inc.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1998
GENERAL NOTE
This data sheet represents specifications for the ADSP-2185L
3.3 V processor.
GENERAL DESCRIPTION
The ADSP-2185L is a single-chip microcomputer optimized for
digital signal processing (DSP) and other high speed numeric
processing applications.
The ADSP-2185L combines the ADSP-2100 family base archi-
tecture (three computational units, data address generators and
a program sequencer) with two serial ports, a 16-bit internal
DMA port, a byte DMA port, a programmable timer, Flag I/O,
extensive interrupt capabilities and on-chip program and data
memory.
The ADSP-2185L integrates 80K bytes of on-chip memory
configured as 16K words (24-bit) of program RAM, and 16K
words (16-bit) of data RAM. Power-down circuitry is also pro-
vided to meet the low power needs of battery operated portable
equipment. The ADSP-2185L is available in 100-lead LQFP
package.
In addition, the ADSP-2185L supports instructions which
include bit manipulations—bit set, bit clear, bit toggle, bit test—
ALU constants, multiplication instruction (x squared), biased
rounding, result free ALU operations, I/O memory transfers and
global interrupt masking, for increased flexibility.
Fabricated in a high speed, low power, CMOS process, the
ADSP-2185L operates with a 19 ns instruction cycle time. Ev-
ery instruction can execute in a single processor cycle.
FEATURES
PERFORMANCE
19 ns Instruction Cycle Time @ 3.3 Volts, 52 MIPS
Sustained Performance
Single-Cycle Instruction Execution
Single-Cycle Context Switch
3-Bus Architecture Allows Dual Operand Fetches in
Every Instruction Cycle
Multifunction Instructions
Power-Down Mode Featuring Low CMOS Standby
Power Dissipation with 400 Cycle Recovery from
Power-Down Condition
Low Power Dissipation in Idle Mode
INTEGRATION
ADSP-2100 Family Code Compatible, with Instruction
Set Extensions
80K Bytes of On-Chip RAM, Configured as 16K Words
Program Memory RAM and 16K Words
Data Memory RAM
Dual Purpose Program Memory for Instructionand Data
Storage
Independent ALU, Multiplier/Accumulator and Barrel
Shifter Computational Units
Two Independent Data Address Generators
Powerful Program Sequencer Provides Zero Overhead
Looping Conditional Instruction Execution
Programmable 16-Bit Interval Timer with Prescaler
100-Lead LQFP
SYSTEM INTERFACE
16-Bit Internal DMA Port for High Speed Access to
On-Chip Memory (Mode Selectable)
4 MByte Memory Interface for Storage of Data Tables
and Program Overlays (Mode Selectable)
8-Bit DMA to Byte Memory for Transparent Program
and Data Memory Transfers (Mode Selectable)
I/O Memory Interface with 2048 Locations Supports
Parallel Peripherals (Mode Selectable)
Programmable Memory Strobe and Separate I/O Memory
Space Permits “Glueless” System Design
Programmable Wait State Generation
Two Double-Buffered Serial Ports with Companding
Hardware and Automatic Data Buffering
Automatic Booting of On-Chip Program Memory from
Byte-Wide External Memory, e.g., EPROM, or
Through Internal DMA Port
Six External Interrupts
13 Programmable Flag Pins Provide Flexible System
Signaling
UART Emulation through Software SPORT Reconfiguration
ICE-Port Emulator Interface Supports Debugging in
Final Systems
FUNCTIONAL BLOCK DIAGRAM
SERIAL PORTS
SPORT 1
SPORT 0
MEMORY
PROGRI/O
FAND
CBYTE DMA
8K
3
8K
3
24 OVERLAY 1
TIMER
ADSP-2100 BASE
ARCHITECTURE
SHIFTER
MAC
ALU
ARITHMETIC UNITS
PCONTROL
PROGRAM
DAG 2
DAG 1
GENERATORS
PROGRAM MEMORY ADDRESS
DATA MEMORY ADDRESS
PROGRAM MEMORY DATA
DATA MEMORY DATA
EXDATA
BUS
ADDRESS
BUS
INDMA
PORT
EDATA
BUS
OR
FUL MODE
HOST MODE
8K
3
16 OVERLAY 1
8K
3
16 OVERLAY 2
(
) (
)
16K
3
24 PM
16K
3
16 DM
相關PDF資料 |
PDF描述 |
|---|---|
| ADSP-2185LKST-210 | DSP Microcomputer |
| ADSP-2185 | DSP Microcomputer |
| ADSP-2185L | LM2941/LM2941C 1A Low Dropout Adjustable Regulator; Package: CERDIP; No of Pins: 16; Qty per Container: 25; Container: Rail |
| ADSP-2185LBST-160 | DSP Microcomputer |
| ADSP-2185LBST-210 | DSP Microcomputer |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADSP-2185LKST-160 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 40MHz 40MIPS 100-Pin LQFP |
| ADSP-2185LKST-210 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 52.5MHz 52.5MIPS 100-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:16K/16K 16 BIT DSP 3.3V - Bulk |
| ADSP-2185LKSTZ-210 | 制造商:Analog Devices 功能描述:16k/16k 16 bit DSP 3.3v |
| ADSP-2185LKSTZ-2102 | 制造商:AD 制造商全稱:Analog Devices 功能描述:DSP Microcomputer |
| ADSP-2185M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ADSP-2185M: 16-bit. 75 MIPS. 2.5v. 2 serial ports. host port. 80 KB RAM Data Sheet (Rev. 0. 10/00) |
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