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參數資料
| 型號： | ADSP-2187N |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 數字信號處理 |
| 英文描述： | DSP Microcomputer |
| 中文描述： | DSP微機 |
| 文件頁數： | 6/48頁 |
| 文件大?。?/td> | 1571K |
| 代理商： | ADSP-2187N |
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ADSP-218xN Series
–6–
REV. 0
Memory Interface Pins
ADSP-218xN series members can be used in one of two
modes: Full Memory Mode, which allows BDMA operation
with full external overlay memory and I/O capability, or
Host Mode, which allows IDMA operation with limited
external addressing capabilities.
The operating mode is determined by the state of the Mode
C pin during RESET and cannot be changed while the
processor is running.
Table 3
and
Table 4
list the active
signals at specific pins of the DSP during either of the two
operating modes (Full Memory or Host). A signal in one
table shares a pin with a signal from the other table, with the
active signal determined by the mode that is set. For the
shared pins and their alternate signals (e.g., A4/IAD3), refer
to the package pinouts in
Table 27 on page 40
and
Table 28
on page 42
.
Terminating Unused Pins
Table 5
shows the recommendations for terminating
unused pins.
Table 3. Full Memory Mode Pins (Mode C = 0)
Pin Name
# of Pins
I/O
Function
A13–0
D23–0
14
24
O
I/O
Address Output Pins for Program, Data, Byte, and I/O Spaces
Data I/O Pins for Program, Data, Byte, and I/O Spaces (8 MSBs are also used
as Byte Memory Addresses.)
Table 4. Host Mode Pins (Mode C = 1)
Pin Name
# of Pins
I/O
Function
IAD15–0
A0
D23–8
IWR
IRD
IAL
IS
IACK
16
1
16
1
1
1
1
1
I/O
O
I/O
I
I
I
I
O
IDMA Port Address/Data Bus
Address Pin for External I/O, Program, Data, or Byte Access
1
Data I/O Pins for Program, Data, Byte, and I/O Spaces
IDMA Write Enable
IDMA Read Enable
IDMA Address Latch Pin
IDMA Select
IDMA Port Acknowledge Configurable in Mode D; Open Drain
1
In Host Mode, external peripheral addresses can be decoded using the A0, CMS, PMS, DMS, and IOMS signals.
Table 5. Unused Pin Terminations
Pin Name
1
I/O
3-State
(Z)
2
Reset
State
Hi-Z
3
Caused By
Unused Configuration
XTAL
CLKOUT
A13–1 or
IAD12–0
A0
D23–8
D7 or
IWR
D6 or
IRD
D5 or
IAL
D4 or
IS
O
O
O (Z)
I/O (Z)
O (Z)
I/O (Z)
I/O (Z)
I
I/O (Z)
I
I/O (Z)
I
I/O (Z)
I
O
O
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
I
Hi-Z
I
Hi-Z
I
Hi-Z
I
Float
Float
4
Float
Float
Float
Float
Float
High (Inactive)
Float
High (Inactive)
Float
Low (Inactive)
Float
High (Inactive)
BR, EBR
IS
BR, EBR
BR, EBR
BR, EBR
BR, EBR
BR, EBR
BR, EBR
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