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參數(shù)資料
| 型號： | ADSP-2189 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection |
| 中文描述： | 無電容，NMOS管，150mA的低壓差穩(wěn)壓器的反向電流保護 |
| 文件頁數(shù)： | 16/32頁 |
| 文件大小： | 244K |
| 代理商： | ADSP-2189 |
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REV. A
ADSP-2189M
–
16
–
FREQUENCY DEPENDENCY FOR TIMING
SPECIFICATIONS
t
CK
is
defined as 0.5t
CKI
. The ADSP-2189M uses an input clock
with a frequency equal to half the instruction rate: a 37.50 MHz
input clock (which is equivalent to 28 ns) yields a 13 ns proces-
sor cycle (equivalent to 75 MHz). t
CK
values within the range of
0.5t
CKI
period should be substituted for all relevant timing pa-
rameters to obtain the specification value.
Example: t
CKH
= 0.5t
CK
– 7 ns = 0.5 (15 ns) – 7 ns = 0.5 ns
ENVIRONMENTAL CONDITIONS
1
Rating Description
Symbol
Value
Thermal Resistance
(Case-to-Ambient)
(Junction-to-Ambient)
(Junction-to-Case)
θ
CA
θ
JA
θ
JC
48
°
C/W
50
°
C/W
2
°
C/W
NOTE
1
Where the ambient temperature rating (T
AMB
) is:
T
AMB
= T
CASE
– (PD
× θ
CA
)
T
CASE
= Case temperature in
°
C
PD = Power dissipation in W.
POWER DISSIPATION
To determine total power dissipation in a specific application,
the following equation should be applied for each output:
C
×
V
DD
2
×
f
C
= load capacitance,
f
= output switching frequency.
Example:
In an application where external data memory is used and no
other outputs are active, power dissipation is calculated as follows:
Assumptions:
External data memory is accessed every cycle with 50% of
the address pins switching.
External data memory writes occur every other cycle with
50% of the data pins switching.
Each address and data pin has a 10 pF total load at the pin.
The application operates at V
DDEXT
= 3.3 V and t
CK
= 15 ns.
Total Power Dissipation
=
P
INT
+ (
C
×
V
DDEXT
2
×
f
)
P
INT
= internal power dissipation from Power vs. Frequency
graph (Figure 15).
(C
×
V
DDEXT2
×
f) is calculated for each output:
# of
Pins C
Parameters
V
DDEXT2
3.3
2
V
3.3
2
V
3.3
2
V
3.3
2
V
f
PD
Address,
DMS
Data Output,
WR
9
RD
CLKOUT
8
10 pF
10 pF
10 pF
10 pF
33.3 MHz
16.67 MHz
16.67 MHz
33.3 MHz
29.0 mW
16.3 mW
1.8 mW
3.6 mW
50.7 mW
1
1
Total power dissipation for this example is P
INT
+ 50.7 mW.
Output Drive Currents
Figure 14 shows typical I-V characteristics for the output drivers
on the ADSP-2189M. The curves represent the current drive
capability of the output drivers as a function of output voltage.
V
OH
V
OL
SOURCE VOLTAGE
–
V
0
0.5
1.0
S
–
60
0
–
20
–
40
–
60
40
20
V
DDEXT
= 3.6V @
–
40 C
V
DDEXT
= 3.3V @ +25 C
V
DDEXT
= 2.5V @ +85 C
V
DDEXT
= 2.5V @ +85 C
V
DDEXT
= 3.3V @ +25 C
V
DDEXT
= 3.6V @
–
40 C
80
–
80
1.5
2.0
2.5
3.0
3.5
4.0
Figure 14. Typical Output Driver Characteristics
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相關代理商/技術參數(shù) |
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|---|---|
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