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參數(shù)資料
| 型號： | ADSP-2196MBST-140X |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | DSP Microcomputer |
| 中文描述： | 16-BIT, 160 MHz, OTHER DSP, PQFP144 |
| 封裝： | METRIC, PLASTIC, LQFP-144 |
| 文件頁數(shù)： | 40/68頁 |
| 文件大小： | 897K |
| 代理商： | ADSP-2196MBST-140X |
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For current information contact Analog Devices at 800/262-5643
ADSP-2196
September 2001
This information applies to a product under development. Its characteristics and specifications are subject to change with-
out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
40
REV. PrA
Host Port ACC Mode Read Cycle Timing
Table 17
and
Figure 20
describe host port read operations in Address Cycle Control (ACC) mode. For more information
on ACK, Ready, ALE, and ACC mode selection, see the Host port modes description
on page 10
.
Table 17. Host Port ACC Mode Read Cycle Timing
Parameter
Description
Min
Max
Unit
Switching Characteristics
t
RHKS
HRD asserted to HACK asserted (setup, ACK Mode)
1
1+t
NH
1
1
t
are peripheral bus latencies (n
the same time.
t
HCLK
); these are internal DSP latencies related to the number of peripherals attempting to access DSP memory at
ns
t
RHKH
HRD de-asserted to HACK de-asserted (hold, ACK Mode)
2
ns
t
RHS
HRD asserted to HACK asserted (setup, Ready Mode)
1
ns
t
RHH
HRD asserted to HACK de-asserted (hold, Ready Mode)
2+t
NH
1
ns
Timing Requirements
t
CSAL
HCMS or HCIOMS asserted to HALE asserted (delay)
0
ns
t
ALCS
HALE de-asserted to optional HCMS or HCIOMS
de-asserted
1
ns
t
RCSW
HRD de-asserted to HCMS or HCIOMS de-asserted
1
ns
t
ALW
HALE asserted to HWR asserted
0.5
ns
t
ALER
HALE de-asserted to HWR asserted
1
ns
t
CSR
HCMS or HCIOMS asserted to HRD asserted
1
2
ns
t
RCS
HRD de-asserted (after last byte) to HCMS or
HCIOMS de-asserted (ready for next read)
1
ns
t
WAL
HWR de-asserted to HALE de-asserted (delay)
1.5
ns
t
HKRD
HACK asserted to HRD de-asserted (hold, ACK Mode)
1.5
ns
t
ADW
Address valid to HWR de-asserted (setup)
4
ns
t
WAD
HWR de-asserted to address invalid (hold)
1
ns
t
RDH
HRD de-asserted to data invalid (hold)
1
ns
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| ADSP-2196MKCA-160X | DSP Microcomputer |
| ADSP-2196MKST-160X | DSP Microcomputer |
| ADSP-21990 | 16-bit fixed point DSP with Flash |
| ADSP-21990BBC | 16-bit fixed point DSP with Flash |
| ADSP-21990BST | 16-bit fixed point DSP with Flash |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADSP-2196MBST-140Z | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 140MHz 140MIPS 144-Pin LQFP |
| ADSP-2196MKST-160 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 160MHz 160MIPS 144-Pin LQFP 制造商:Analog Devices 功能描述:16-Bit DSP 160 MIPs 2.5V 40 Kbytes |
| ADSP-2196MKSTZ-160 | 功能描述:IC DSP CONTROLLER 16BIT 144-LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:ADSP-21xx 標準包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| ADSP-21990BBC | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 150MHz 150MIPS 196-Pin Mini-BGA 制造商:Rochester Electronics LLC 功能描述:160 MIPS, MIXED SIGNAL DSPWITH 14-BIT - Bulk |
| ADSP-21990BST | 制造商:Rochester Electronics LLC 功能描述:160 MIPS,MIXED SIGNAL DSP WITH 14BIT - Tape and Reel |
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