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參數(shù)資料
| 型號： | ADSP-21MOD970-110 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 調(diào)制器/解調(diào)器 |
| 英文描述： | Multiport Internet Gateway Processor Solution |
| 中文描述： | 56 kbps DATA, 8 kbps FAX, MODEM, PBGA304 |
| 封裝： | PLASTIC, BGA-304 |
| 文件頁數(shù)： | 3/6頁 |
| 文件大小： | 80K |
| 代理商： | ADSP-21MOD970-110 |
REV. 0
ADSP-21mod970-110
–3–
SOFTWARE INTERFACE
Analog Devices provides sample C code for the software inter-
face to the ADSP-21mod970-110. The software interface en-
compasses the following four areas—download, control interface,
data interface and modem statistics.
Download
The DMA Port on the ADSP-21mod970-110 contains an auto-
incrementing address generator. The host writes the starting
address of the transfer and then writes the first word of data.
After the first write, the DMA address generator automatically
increments; the host writes the next data word and the DMA
transfers that word to the next location in ADSP-21mod970-
110 memory.
The executable image contains code and data that must be
loaded into program and data memory. Program memory on the
ADSP-21mod970-110 is 24 bits wide, therefore two transfers
are used to load each word of program memory.
The host begins the download by asserting the
RESET
pin of
the ADSP-21mod970-110. The host then transfers all code and
data. All internal memory can be loaded in 5 ms.
Control Interface
The ADSP-21mod970-110 is controlled through two FIFOs in
DSP memory. The host sends a control event by writing to the
host-to-modem
FIFO. The ADSP-21mod970-110 posts events to
the host by writing into the
modem-to-host
FIFO.
Data Interface
All data transferred to and from the ADSP-21mod970-110
passes through word FIFOs located in internal memory on the
ADSP-21mod970-110. The FIFOs are accessed through a
control structure that contains a pointer to the start of the FIFO
in memory, the length of the FIFO in 16-bit words, a pointer to
the next address to be read, and a pointer to the next address to
be written. The transmit and receive FIFOs are 1024 bytes
deep. Example code providing primitives for accessing the byte-
FIFOs is available from Analog Devices. Table I shows an ex-
ample of a data FIFO.
Table I. FIFO Example
INFO
INFO
INFO
INFO
BASE
PD_PTR
WR_PDR
BASE + SIZE
Modem Statistics
Several modem statistics can be gathered through the DMA
Port. These statistics include call status, modulation in use,
connect rate, transmit and receive data rate, symbol rate, retrain
count, rate renegotiation count and others. Table II and Table IV
contain a complete listing of available modem statistics.
Modem Configuration
The modem is configured by programming various parameters
through the DMA Port. Table III and Table V contain complete
lists of modem configuration parameters.
Table II. Shell Status
Reference #
Function
SS. 0
SS. 1
SS. 2
SS. 3
Product Number
Application Version
Application Type
Programmable Flag Data
Table III. Shell Parameters
Reference #
Function
SP. 0
SP. 1
SP. 2
SP. 3
SP. 4
SP. 5
Serial Port Tx Time Slot
Serial Port Rx Time Slot
Serial Port Configuration
Programmable Flag Control
Programmable Flag Data
Host Interrupt Count
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