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參數(shù)資料
| 型號： | ADT7516ARQ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 溫度/濕度傳感器 |
| 英文描述： | SPI/I2C Compatible, Temperature Sensor, Four Channel ADC and Quad Voltage Output DAC |
| 中文描述： | DIGITAL TEMP SENSOR-SERIAL, 12BIT(s), 16Cel, RECTANGULAR, SURFACE MOUNT |
| 封裝： | MO-137AB, QSOP-16 |
| 文件頁數(shù)： | 34/44頁 |
| 文件大小： | 1350K |
| 代理商： | ADT7516ARQ |
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ADT7516/ADT7517/ADT7519
LDAC Configuration Register (Write-Only) [Add. = 1Ch]
This configuration register is an 8-bit write register that is used
to control the updating of the quad DAC outputs if the LDAC
pin is disabled and Bits D4:D5 of the DAC configuration reg-
ister are both set to 1. Also selects either the internal or external
V
REF
for all four DACs. Bits D0:D3 in this register are self-clear-
ing, i.e., reading back from this register will always give 0s for
these bits.
Table 45. LDAC Configuration
D7
D6
D5
D4
D7
D6
D5
D4
0*
0*
0*
0*
Rev. A | Page 34 of 44
D3
D3
0*
D2
D2
0*
D1
D1
0*
D0
D0
0*
*Default settings at power-up.
Table 46.
Bit
Function
D0
Writing a 1 to this bit will generate the LDAC command
to update DAC A output only.
D1
Writing a 1 to this bit will generate the LDAC command
to update DAC B output only.
D2
Writing a 1 to this bit will generate the LDAC command
to update DAC C output only.
D3
Writing a 1 to this bit will generate the LDAC command
to update DAC D output only.
D4
Selects either internal V
REF
or external V
REF
for DACs A
and B.
0 = External V
REF
1 = Internal V
REF
.
D5
Selects either internal V
REF
or external V
REF
for DACs C
and D.
0 = External V
REF
1 = Internal V
REF
D6:D7 Reserved. Write 0s only.
Interrupt Mask 1 Register (Read/Write) [Add. = 1Dh]
This mask register is an 8-bit read/write register that can be
used to mask any interrupts that can cause the INT/INT pin to
go active.
Table 47. Interrupt Mask 1
D7
D6
D5
D4
D7
D6
D5
D4
0*
0*
0*
0*
D3
D3
0*
D2
D2
0*
D1
D1
0*
D0
D0
0*
*Default settings at power-up.
Table 48.
Bit
D0
Function
0 = Enable internal T
HIGH
interrupt.
1 = Disable internal T
HIGH
interrupt.
0 = Enable internal T
LOW
interrupt.
1 = Disable internal T
LOW
interrupt.
0 = Enable external T
HIGH
interrupt or AIN1 interrupt.
1 = Disable external T
HIGH
interrupt or AIN1 interrupt.
0 = Enable external T
LOW
interrupt.
1 = Disable external T
LOW
interrupt.
0 = Enable external temperature fault interrupt.
1 = Disable external temperature fault interrupt.
0 = Enable AIN2 interrupt.
1 = Disable AIN2 interrupt.
0 = Enable AIN3 interrupt.
1 = Disable AIN3 interrupt.
0 = Enable AIN4 interrupt.
1 = Disable AIN4 interrupt.
D1
D2
D3
D4
D5
D6
D7
Interrupt Mask 2 Register (Read/Write) [Add. = 1Eh]
This mask register is an 8-bit read/write register that can be
used to mask any interrupts that can cause the INT/INT pin to
go active.
Table 49. Interrupt Mask 2
D7
D6
D5
D4
D7
D6
D5
D4
0*
0*
0*
0*
D3
D3
0*
D2
D2
0*
D1
D1
0*
D0
D0
0*
*Default settings at power-up.
Table 50.
Bit
D0:D3
D4
Function
Reserved. Write 0s only.
0 = Enable V
DD
interrupts.
1 = Disable V
DD
interrupts.
Reserved. Write 0s only.
D5:D7
Internal Temperature Offset Register (Read/Write)
[Add. = 1Fh]
This register contains the offset value for the internal temp-
erature channel. A twos complement number can be written to
this register which is then added to the measured result before it
is stored or compared to limits. In this way, a one-point cali-
bration can be done whereby the whole transfer function of the
channel can be moved up or down. From a software point of
view, this may be a very simple method to vary the charac-
teristics of the measurement channel if the thermal charac-
teristics change. Because it is an 8-bit register, the temperature
resolution is 1°C.
Table 51. Internal Temperature Offset
D7
D6
D5
D4
D7
D6
D5
D4
0*
0*
0*
0*
D3
D3
0*
D2
D2
0*
D1
D1
0*
D0
D0
0*
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