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參數資料
| 型號： | ADUC841BCP62-5 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Cable Gland (Clamp); Connector Shell Size:10SL, 12S; Thread Size:5/8-24; Approval Categories:MIL-C-5015; Series:97 RoHS Compliant: Yes |
| 中文描述： | 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, QCC56 |
| 封裝： | 8 X 8 MM, LEAD FRAME, MO-220VLLD2, CSP-56 |
| 文件頁數： | 10/88頁 |
| 文件大?。?/td> | 903K |
| 代理商： | ADUC841BCP62-5 |
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ADuC841/ADuC842/ADuC843
Mnemonic
P3.0–P3.7
Rev. 0 | Page 10 of 88
Type
I/O
Function
Port 3 is a bidirectional port with internal pull-up resistors. Port 3 pins that have 1s written to them are pulled high
by the internal pull-up resistors, and in that state can be used as inputs. As inputs, Port 3 pins being pulled
externally low source current because of the internal pull-up resistors. Port 3 pins also contain various secondary
functions, which are described below.
PWM Clock Input.
PWM0 Voltage Output. PWM outputs can be configured to use Ports 2.6 and 2.7 or Ports 3.4 and 3.3.
PWM1 Voltage Output. See the CFG841/CFG842 register for further information.
Receiver Data Input (Asynchronous) or Data Input/Output (Synchronous) of the Serial (UART) Port.
Transmitter Data Output (Asynchronous) or Clock Output (Synchronous) of the Serial (UART) Port.
Interrupt 0. Programmable edge or level triggered interrupt input; can be programmed to one of two priority
levels. This pin can also be used as a gate control input to Timer 0.
Interrupt 1. Programmable edge or level triggered interrupt input; can be programmed to one of two priority
levels. This pin can also be used as a gate control input to Timer 1.
Timer/Counter 0 Input.
Timer/Counter 1 Input.
Active Low Convert Start Logic Input for the ADC Block when the External Convert Start Function is Enabled. A
low-to-high transition on this input puts the track-and-hold into hold mode and starts the conversion.
Input for External Clock Signal. Has to be enabled via the CFG842 register.
Write Control Signal, Logic Output. Latches the data byte from Port 0 into the external data memory.
Read Control Signal, Logic Output. Enables the external data memory to Port 0.
Output of the Inverting Oscillator Amplifier.
Input to the Inverting Oscillator Amplifier.
Digital Ground. Ground reference point for the digital circuitry.
Port 2 is a bidirectional port with internal pull-up resistors. Port 2 pins that have 1s written to them are pulled high
by the internal pull-up resistors, and in that state can be used as inputs. As inputs, Port 2 pins being pulled
externally low source current because of the internal pull-up resistors. Port 2 emits the middle and high-order
address bytes during accesses to the external 24-bit external data memory space.
Program Store Enable, Logic Output. This pin remains low during internal program execution. PSEN is used to
enable serial download mode when pulled low through a resistor on power-up or reset. On reset this pin will
momentarily become an input and the status of the pin is sampled. If there is no pulldown resistor in place the pin
will go momentarilly high and then user code will execute. If a pull-down resistor is in place, the embedded serial
download/debug kernel will execute.
Address Latch Enable, Logic Output. This output is used to latch the low byte and page byte for 24-bit address
space accesses of the address into external data memory.
External Access Enable, Logic Input. When held high, this input enables the device to fetch code from internal
program memory locations. The parts do not support external code memory. This pin should not be left floating.
Port 0 is an 8-bit open-drain bidirectional I/O port. Port 0 pins that have 1s written to them float, and in that state
can be used as high impedance inputs. Port 0 is also the multiplexed low-order address and data bus during
accesses to external data memory. In this application, it uses strong internal pull-ups when emitting 1s.
Types: P = Power, G = Ground, I= Input, O = Output., NC = No Connect
PWMC
PWM0
PWM1
RxD
TxD
INT0
I
O
O
I/O
O
I
INT1
I
T0
T1
CONVST
I
I
I
EXTCLK
WR
RD
XTAL2
XTAL1
DGND
P2.0–P2.7
(A8–A15)
(A16–A23)
I
O
O
O
I
G
I/O
PSEN
O
ALE
O
EA
I
P0.7–P0.0
(A0-A7)
I/O
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PDF描述 |
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| ADUC841BCP8-3 | 10-823955-004 |
| ADUC841BCP8-5 | Cable Gland (Clamp); Connector Shell Size:14, 14S; Thread Size:3/4-20; Body Material:Zinc Alloy |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ADUC841BCP8-3 | 制造商:Analog Devices 功能描述:MCU 8-bit ADuC8xx 8052 CISC 62KB Flash 3V 56-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:8BIT CISC 62KB FLASH 20MHZ 3.3V 56LFCSP - Bulk |
| ADUC841BCP8-5 | 制造商:AD 制造商全稱:Analog Devices 功能描述:MicroConverter 12-Bit ADCs and DACs with Embedded High Speed 62-kB Flash MCU |
| ADUC841BCPZ62-3 | 功能描述:IC MCU 62K FLASH ADC/DAC 56LFCSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC8xx 標準包裝:38 系列:Encore!® XP® 核心處理器:eZ8 芯體尺寸:8-位 速度:5MHz 連通性:IrDA，UART/USART 外圍設備:欠壓檢測/復位，LED，POR，PWM，WDT 輸入/輸出數:16 程序存儲器容量:4KB（4K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 3.6 V 數據轉換器:- 振蕩器型:內部 工作溫度:-40°C ~ 105°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:管件 其它名稱:269-4116Z8F0413SH005EG-ND |
| ADUC841BCPZ62-5 | 功能描述:IC MCU 62K FLASH ADC/DAC 56LFCSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC8xx 標準包裝:38 系列:Encore!® XP® 核心處理器:eZ8 芯體尺寸:8-位 速度:5MHz 連通性:IrDA，UART/USART 外圍設備:欠壓檢測/復位，LED，POR，PWM，WDT 輸入/輸出數:16 程序存儲器容量:4KB（4K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 3.6 V 數據轉換器:- 振蕩器型:內部 工作溫度:-40°C ~ 105°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:管件 其它名稱:269-4116Z8F0413SH005EG-ND |
| ADUC841BCPZ62-5LCSP56 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
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