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參數資料
型號: ADUM1201AR
廠商: ANALOG DEVICES INC
元件分類: 模擬信號調理
英文描述: Dual-Channel Digital Isolators
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO8
封裝: MS-012AA, SOIC-8
文件頁數: 6/20頁
文件大小: 704K
代理商: ADUM1201AR
ADuM1200/ADuM1201
Parameter
ADuM120xBR
Minimum Pulse Width
2
Maximum Data Rate
3
Propagation Delay
4
Pulse-Width Distortion, |t
PLH
t
PHL
|
4
Change Versus Temperature
Propagation Delay Skew
5
Channel-to-Channel Matching,
Codirectional Channels
6
Channel-to-Channel Matching,
Opposing Directional Channels
6
Output Rise/Fall Time (10% to 90%)
ADuM120xCR
Minimum Pulse Width
2
Maximum Data Rate
3
Propagation Delay
4
Pulse-Width Distortion, |t
PLH
t
PHL
|
4
Change Versus Temperature
Propagation Delay Skew
5
Channel-to-Channel Matching,
Codirectional Channels
6
Channel-to-Channel Matching,
Opposing Directional Channels
6
Output Rise/Fall Time (10% to 90%)
For All Models
Common Mode Transient Immunity
at Logic High Output
7
Common Mode Transient Immunity
at Logic Low Output
7
Refresh Rate
Input Dynamic Supply Current, per Channel
8
Output Dynamic Supply Current, per Channel
8
Rev. B | Page 6 of 20
Symbol
PW
t
PHL
, t
PLH
PWD
t
PSK
t
PSKCD
Min
10
20
Typ
5
Max
100
60
3
22
3
Unit
ns
Mbps
ns
ns
ps/°C
ns
ns
Test Conditions
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
t
PSKOD
22
ns
C
L
= 15 pF, CMOS signal levels
t
R
/t
F
PW
t
PHL
, t
PLH
PWD
t
PSK
t
PSKCD
25
20
3.0
20
50
5
40
55
3
16
3
ns
ns
Mbps
ns
ns
ps/°C
ns
ns
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
t
PSKOD
16
ns
C
L
= 15 pF, CMOS signal levels
t
R
/t
F
|CM
H
|
25
3.0
35
ns
kV/μs
C
L
= 15 pF, CMOS signal levels
V
Ix
= V
DD1
, V
DD2
, V
CM
= 1000 V,
transient magnitude = 800 V
V
Ix
= 0 V, V
CM
= 1000 V,
transient magnitude = 800 V
|CM
L
|
25
35
kV/μs
f
r
I
DDI (D)
I
DDO (D)
1.1
0.10
0.03
Mbps
mA/Mbps
mA/Mbps
1
The supply current values for both channels are combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate may be calculated as described in the Power Consumption section. See
Figure 6 through
for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure through Figure 11
for total I
2
The minimum pulse width is the shortest pulse width at which the specified pulse-width distortion is guaranteed.
3
The maximum data rate is the fastest data rate at which the specified pulse-width distortion is guaranteed.
4
t
PHL
propagation delay is measured from the 50% level of the falling edge of the V
Ix
signal to the 50% level of the falling edge of the V
Ox
signal. t
PLH
propagation delay is
measured from the 50% level of the rising edge of the V
Ix
signal to the 50% level of the rising edge of the V
Ox
signal.
5
t
PSK
is the magnitude of the worst-case difference in t
PHL
and/or t
PLH
that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6
Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
7
CM
H
is the maximum common-mode voltage slew rate that can be sustained while maintaining V
O
> 0.8 V
DD2
. CM
L
is the maximum common-mode voltage slew rate
that can be sustained while maintaining V
O
< 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
8
Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See
information on per-channel supply current for unloaded and loaded conditions. See the
current for a given data rate.
Figure 8
Figure 8
9
DD1
and I
DD2
supply currents as a function of data rate for ADuM1200 and ADuM1201 channel configurations.
through
for
section for guidance on calculating per-channel supply
Power Consumption
Figure 6
相關PDF資料
PDF描述
ADUM1201AR-RL7 Dual-Channel Digital Isolators
ADUM1201ARZ Dual-Channel Digital Isolators
ADUM1201ARZ-RL7 Dual-Channel Digital Isolators
ADUM1201BR Dual-Channel Digital Isolators
ADUM1201BR-RL7 Dual-Channel Digital Isolators
相關代理商/技術參數
參數描述
ADUM1201AR-RL7 功能描述:IC ISOLATOR DIGITAL DUAL 8SOIC RoHS:否 類別:隔離器 >> 數字隔離器 系列:iCoupler® 產品培訓模塊:IsoLoop® Isolator 標準包裝:50 系列:IsoLoop® 輸入 - 1 側/2 側:5/0 通道數:5 電源電壓:3 V ~ 5.5 V 電壓 - 隔離:2500Vrms 數據速率:110Mbps 傳輸延遲:12ns 輸出類型:CMOS 封裝/外殼:16-SOIC(0.154",3.90mm 寬) 供應商設備封裝:16-SOIC N 包裝:管件 工作溫度:-40°C ~ 85°C 其它名稱:390-1053-5
ADUM1201ARW 制造商:Analog Devices 功能描述:- Bulk
ADUM1201ARWZ 制造商:AD 制造商全稱:Analog Devices 功能描述:ESD/Latch-Up Considerations with iCoupler?? Isolation Products
ADUM1201ARZ 功能描述:IC DIGITAL ISOLATOR 2CH 8-SOIC RoHS:是 類別:隔離器 >> 數字隔離器 系列:iCoupler® 產品培訓模塊:IsoLoop® Isolator 標準包裝:50 系列:IsoLoop® 輸入 - 1 側/2 側:5/0 通道數:5 電源電壓:3 V ~ 5.5 V 電壓 - 隔離:2500Vrms 數據速率:110Mbps 傳輸延遲:12ns 輸出類型:CMOS 封裝/外殼:16-SOIC(0.154",3.90mm 寬) 供應商設備封裝:16-SOIC N 包裝:管件 工作溫度:-40°C ~ 85°C 其它名稱:390-1053-5
ADUM1201ARZ-RL7 功能描述:IC ISOLATOR DIGITAL DUAL 8-SOIC RoHS:是 類別:隔離器 >> 數字隔離器 系列:iCoupler® 標準包裝:66 系列:iCoupler® 輸入 - 1 側/2 側:2/2 通道數:4 電源電壓:3.3V,5V 電壓 - 隔離:2500Vrms 數據速率:25Mbps 傳輸延遲:60ns 輸出類型:邏輯 封裝/外殼:20-SSOP(0.209",5.30mm 寬) 供應商設備封裝:20-SSOP 包裝:管件 工作溫度:-40°C ~ 105°C
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