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參數資料
| 型號： | ADUM1201CRZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調理 |
| 英文描述： | Dual-Channel Digital Isolators |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO8 |
| 封裝： | ROHS COMPLIANT, MS-012AA, SOIC-8 |
| 文件頁數： | 3/20頁 |
| 文件大小： | 704K |
| 代理商： | ADUM1201CRZ |
ADuM1200/ADuM1201
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V OPERATION
All voltages are relative to their respective ground. 4.5 V ≤ V
DD1
≤ 5.5 V, 4.5 V ≤ V
DD2
≤ 5.5 V. All min/max specifications apply over the
entire recommended operating range, unless otherwise noted. All typical specifications are at T
A
= 25°C, V
DD1
= V
DD2
= 5 V.
Table 1.
Parameter
Symbol
Min
DC SPECIFICATIONS
Input Supply Current, per Channel, Quiescent
I
DDI (Q)
Output Supply Current, per Channel, Quiescent
I
DDO (Q)
ADuM1200, Total Supply Current, Two Channels
1
DC to 2 Mbps
V
DD1
Supply Current
I
DD1 (Q)
V
DD2
Supply Current
I
DD2 (Q)
10 Mbps (BR and CR Grades Only)
V
DD1
Supply Current
I
DD1 (10)
V
DD2
Supply Current
I
DD2 (10)
25 Mbps (CR Grade Only)
V
DD1
Supply Current
I
DD1 (25)
V
DD2
Supply Current
I
DD2 (25)
ADuM1201, Total Supply Current, Two Channels
1
DC to 2 Mbps
V
DD1
Supply Current
I
DD1 (Q)
V
DD2
Supply Current
I
DD2 (Q)
10 Mbps (BR and CR Grades Only)
V
DD1
Supply Current
I
DD1 (10)
V
DD2
Supply Current
I
DD2 (10)
25 Mbps (CR Grade Only)
V
DD1
Supply Current
I
DD1 (25)
V
DD2
Supply Current
I
DD2 (25)
For All Models
Input Currents
I
IA
, I
IB
10
Logic High Input Threshold
V
IH
0.7 V
DD1
, V
DD2
Logic Low Input Threshold
V
IL
Rev. B | Page 3 of 20
Typ
0.50
0.19
1.1
0.5
4.3
1.3
10
2.8
0.8
0.8
2.8
2.8
6.3
6.3
+0.01
Max
0.60
0.25
1.4
0.8
5.5
2.0
13
3.4
1.1
1.1
3.5
3.5
8.0
8.0
+10
0.3 V
DD1,
V
DD2
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
μA
V
V
Test Conditions
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
5 MHz logic signal freq.
5 MHz logic signal freq.
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
5 MHz logic signal freq.
5 MHz logic signal freq.
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
0 ≤ V
IA
, V
IB
≤ V
DD1
or V
DD2
Logic High Output Voltages
V
OAH
V
DD1
,
V
DD2
0.1
V
DD1
,
V
DD2
0.5
1
50
5.0
V
I
Ox
= 20 μA, V
Ix
= V
IxH
V
OBH
4.8
V
I
Ox
= 4 mA, V
Ix
= V
IxH
Logic Low Output Voltages
V
OAL
V
OBL
PW
t
PHL
, t
PLH
PWD
t
PSK
t
PSKCD/OD
t
R
/t
F
0.0
0.04
0.2
10
0.1
0.1
0.4
1000
150
40
100
50
V
V
V
ns
Mbps
ns
ns
ns
ns
ns
I
Ox
= 20 μA, V
Ix
= V
IxL
I
Ox
= 400 μA, V
Ix
= V
IxL
I
Ox
= 4 mA, V
Ix
= V
IxL
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
SWITCHING SPECIFICATIONS
ADuM120xAR
Minimum Pulse Width
2
Maximum Data Rate
3
Propagation Delay
4
Pulse-Width Distortion, |t
PLH
t
PHL
|
4
Propagation Delay Skew
5
Channel-to-Channel Matching
6
Output Rise/Fall Time (10% to 90%)
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相關代理商/技術參數 |
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