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參數資料
| 型號： | ADUM2402ARWZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調理 |
| 英文描述： | Quad-Channel Digital Isolators, 5KV |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO16 |
| 封裝： | ROHS COMPLIANT, MS-013-AA, SOIC-16 |
| 文件頁數： | 19/23頁 |
| 文件大小： | 209K |
| 代理商： | ADUM2402ARWZ |
Preliminary Technical Data
ADuM2400/ADuM2401/ADuM2402
APPLICATION INFORMATION
PC BOARD LAYOUT
The ADuM240x digital isolator requires no external interface
circuitry for the logic interfaces. Power supply bypassing is
strongly recommended at the input and output supply pins
(Figure 17). Bypass capacitors are most conveniently connected
between Pins 1 and 2 for V
DD1
and between Pins 15 and 16 for
V
DD2
. The capacitor value should be between 0.01 μF and 0.1 μF.
The total lead length between both ends of the capacitor and
the input power supply pin should not exceed 20 mm.
Bypassing between Pins 1 and 8 and between Pins 9 and 16
should also be considered unless the ground pair on each
package side are connected close to the package.
Rev. PrD | Page 19 of 23
V
GND
1
V
IA
V
IB
V
IC/OC
V
ID/OD
E1
GND
1
V
GND
2
V
OA
V
OB
V
OC/IC
V
OD/ID
V
E2
GND
2
0
Figure 17. Recommended Printed Circuit Board Layout
In applications involving high common-mode transients, care
should be taken to ensure that board coupling across the
isolation barrier is minimized. Furthermore, the board layout
should be designed such that any coupling that does occur
equally affects all pins on a given component side. Failure to
ensure this could cause voltage differentials between pins
exceeding the device’s Absolute Maximum Ratings, thereby
leading to latch-up or permanent damage.
PROPAGATION DELAY-RELATED PARAMETERS
Propagation delay is a parameter that describes the length of
time it takes for a logic signal to propagate through a
component. The propagation delay to a logic low output may
differ from the propagation delay to a logic high.
INPUT (V
IX
)
OUTPUT (V
OX
)
t
PLH
t
PHL
50%
50%
0
Figure 18. Propagation Delay Parameters
Pulsewidth distortion is the maximum difference between these
two propagation delay values and is an indication of how
accurately the input signal’s timing is preserved.
Channel-to-channel matching refers to the maximum amount
the propagation delay differs among channels within a single
ADuM240x component.
Propagation delay skew refers to the maximum amount the
propagation delay differs among multiple ADuM240x
components operated under the same conditions.
DC CORRECTNESS AND MAGNETIC FIELD
IMMUNITY
Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent via the transformer to the
decoder. The decoder is bistable and is therefore either set or
reset by the pulses indicating input logic transitions. In the
absence of logic transitions at the input for more than 2 μs, a
periodic set of "refresh" pulses indicative of the correct input
state are sent to ensure "dc correctness" at the output. If the
decoder receives no pulses for more than about 5 μs, the input
side is assumed to be unpowered or nonfunctional, in which
case the isolator output is forced to a default state (see Table 10)
by the watchdog timer circuit.
The limitation on the ADuM240x’s magnetic field immunity is
set by the condition in which induced voltage in the transformer’s
“receiving” coil is sufficiently large to either falsely set or reset the
decoder. The analysis below defines the conditions under which
this may occur. The 3 V operating condition of the ADuM240x is
examined as it represents the most susceptible mode of operation.
The pulses at the transformer output have an amplitude greater than
1.0 V The decoder has a sensing threshold at about 0.5 V therefore
establishing a 0.5 V margin in which induced voltages can be
tolerated. The voltage induced across the “receiving” coil is given by:
V
= (
–dβ/dt
)
∑
∏
r
n2
;
n
= 1, 2,…,
N
where:
β
is magnetic flux density (gauss)
N
is the number of turns in the receiving coil.
r
n
is the radius of the n
th
turn in the receiving coil (cm).
Given the geometry of the receiving coil in the ADuM240x and
an imposed requirement that the induced voltage be at most
50% of the 0.5 V margin at the decoder, a maximum allowable
magnetic field is calculated as shown in below in Figure 19.
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相關代理商/技術參數 |
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| ADUM2402ARWZ-RL | 功能描述:IC ISOLATOR DIGITAL QUAD 16SOIC RoHS:是 類別:隔離器 >> 數字隔離器 系列:iCoupler® 產品培訓模塊:IsoLoop® Isolator 標準包裝:50 系列:IsoLoop® 輸入 - 1 側/2 側:5/0 通道數:5 電源電壓:3 V ~ 5.5 V 電壓 - 隔離:2500Vrms 數據速率:110Mbps 傳輸延遲:12ns 輸出類型:CMOS 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:16-SOIC N 包裝:管件 工作溫度:-40°C ~ 85°C 其它名稱:390-1053-5 |
| ADUM2402BRIZ | 功能描述:IC ISOLATOR DGTL 4CH 16SOIC RoHS:是 類別:隔離器 >> 數字隔離器 系列:iCoupler® 產品培訓模塊:IsoLoop® Isolator 標準包裝:50 系列:IsoLoop® 輸入 - 1 側/2 側:5/0 通道數:5 電源電壓:3 V ~ 5.5 V 電壓 - 隔離:2500Vrms 數據速率:110Mbps 傳輸延遲:12ns 輸出類型:CMOS 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:16-SOIC N 包裝:管件 工作溫度:-40°C ~ 85°C 其它名稱:390-1053-5 |
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