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參數資料
型號: ADUM3200BRZ
廠商: ANALOG DEVICES INC
元件分類: 模擬信號調理
英文描述: Dual-Channel, Digital Isolators, Enhanced System-Level ESD Reliability
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO8
封裝: ROHS COMPLIANT, MS-012AA, SOIC-8
文件頁數: 9/20頁
文件大?。?/td> 222K
代理商: ADUM3200BRZ
ADuM3200/ADuM3201
Parameter
ADuM320xCR
Minimum Pulse Width
2
Maximum Data Rate
3
Propagation Delay
4
Pulse-Width Distortion, |t
PLH
– t
PHL
|
4
Change vs. Temperature
Propagation Delay Skew
5
Channel-to-Channel Matching,
Codirectional Channels
6
Channel-to-Channel Matching,
Opposing Directional Channels
6
Output Rise/Fall Time (10% to 90%)
5 V/3 V Operation
3 V/5 V Operation
For All Models
Common-Mode Transient Immunity
at Logic High Output
7
Common-Mode Transient Immunity
at Logic Low Output
7
Refresh Rate
5 V/3 V Operation
3 V/5 V Operation
Input Dynamic Supply Current,
per Channel
8
5 V/3 V Operation
3 V/5 V Operation
Output Dynamic Supply Current,
per Channel
8
5 V/3 V Operation
3 V/5 V Operation
1
The supply current values for both channels are combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate may be calculated as described in the Power Consumption section. See
Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11
for total I
DD1
and I
DD2
supply currents as a function of data rate for ADuM3200 and ADuM3201 channel configurations.
2
The minimum pulse width is the shortest pulse width at which the specified pulse-width distortion is guaranteed.
3
The maximum data rate is the fastest data rate at which the specified pulse-width distortion is guaranteed.
4
t
PHL
propagation delay is measured from the 50% level of the falling edge of the V
Ix
signal to the 50% level of the falling edge of the V
Ox
signal. t
PLH
propagation delay is
measured from the 50% level of the rising edge of the V
Ix
signal to the 50% level of the rising edge of the V
Ox
signal.
5
t
PSK
is the magnitude of the worst-case difference in t
PHL
and/or t
PLH
that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6
Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
7
CM
H
is the maximum common-mode voltage slew rate that can be sustained while maintaining V
O
> 0.8 V
DD2
. CM
L
is the maximum common-mode voltage slew rate
that can be sustained while maintaining V
O
< 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
8
Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for
information on per-channel supply current for unloaded and loaded conditions. See the Power Consumption section for guidance on calculating per-channel supply
current for a given data rate.
Rev. 0 | Page 9 of 20
Symbol
PW
t
PHL
, t
PLH
PWD
t
PSK
t
PSKCD
Min
25
20
Typ
20
50
5
Max
40
50
3
15
3
Unit
ns
Mbps
ns
ns
ps/°C
ns
ns
Test Conditions
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
t
PSKOD
15
ns
C
L
= 15 pF, CMOS signal levels
t
R
/t
f
|CM
H
|
25
3.0
2.5
35
ns
ns
kV/μs
C
L
= 15 pF, CMOS signal levels
C
L
= 15 pF, CMOS signal levels
V
Ix
= V
DD1
, V
DD2
, V
CM
= 1000 V,
transient magnitude = 800 V
V
Ix
= 0 V, V
CM
= 1000 V,
transient magnitude = 800 V
|CM
L
|
25
35
kV/μs
f
r
I
DDI (D)
1.2
1.1
Mbps
Mbps
I
DDO (D)
0.19
0.10
mA/Mbps
mA/Mbps
0.03
0.05
mA/Mbps
mA/Mbps
相關PDF資料
PDF描述
ADUM3200BRZ-RL7 Dual-Channel, Digital Isolators, Enhanced System-Level ESD Reliability
ADUM3200 Dual-Channel, Digital Isolators, Enhanced System-Level ESD Reliability
ADUM3200ARZ Dual-Channel, Digital Isolators, Enhanced System-Level ESD Reliability
ADUM3200ARZ-RL7 Dual-Channel, Digital Isolators, Enhanced System-Level ESD Reliability
ADUM3200CRZ Dual-Channel, Digital Isolators, Enhanced System-Level ESD Reliability
相關代理商/技術參數
參數描述
ADUM3200BRZ 制造商:Analog Devices 功能描述:DIGITAL ISOLATOR, 2CH, 50NS, NSOIC-8
ADUM3200BRZ-RL7 功能描述:IC DIGITAL ISOLATOR 2CH 8-SOIC RoHS:是 類別:隔離器 >> 數字隔離器 系列:iCoupler® 產品培訓模塊:IsoLoop® Isolator 標準包裝:50 系列:IsoLoop® 輸入 - 1 側/2 側:5/0 通道數:5 電源電壓:3 V ~ 5.5 V 電壓 - 隔離:2500Vrms 數據速率:110Mbps 傳輸延遲:12ns 輸出類型:CMOS 封裝/外殼:16-SOIC(0.154",3.90mm 寬) 供應商設備封裝:16-SOIC N 包裝:管件 工作溫度:-40°C ~ 85°C 其它名稱:390-1053-5
ADUM3200CRZ 功能描述:IC DIGITAL ISOLATOR 2CH 8SOIC RoHS:是 類別:隔離器 >> 數字隔離器 系列:iCoupler® 標準包裝:66 系列:iCoupler® 輸入 - 1 側/2 側:2/2 通道數:4 電源電壓:3.3V,5V 電壓 - 隔離:2500Vrms 數據速率:25Mbps 傳輸延遲:60ns 輸出類型:邏輯 封裝/外殼:20-SSOP(0.209",5.30mm 寬) 供應商設備封裝:20-SSOP 包裝:管件 工作溫度:-40°C ~ 105°C
ADUM3200CRZ-RL7 功能描述:IC DIGITAL ISOLATOR 2CH 8-SOIC RoHS:是 類別:隔離器 >> 數字隔離器 系列:iCoupler® 產品培訓模塊:IsoLoop® Isolator 標準包裝:50 系列:IsoLoop® 輸入 - 1 側/2 側:5/0 通道數:5 電源電壓:3 V ~ 5.5 V 電壓 - 隔離:2500Vrms 數據速率:110Mbps 傳輸延遲:12ns 輸出類型:CMOS 封裝/外殼:16-SOIC(0.154",3.90mm 寬) 供應商設備封裝:16-SOIC N 包裝:管件 工作溫度:-40°C ~ 85°C 其它名稱:390-1053-5
ADUM3200TRZ-EP 功能描述:General Purpose Digital Isolator 2500Vrms 2 Channel 25Mbps 25kV/μs CMTI 8-SOIC (0.154", 3.90mm Width) 制造商:analog devices inc. 系列:iCoupler? 包裝:管件 零件狀態:有效 技術:磁耦合 類型:通用 隔離式電源:無 通道數:2 輸入 - 輸入側 1/輸入側 2:2/0 通道類型:單向 電壓 - 隔離:2500Vrms 共模瞬態抗擾度(最小值):25kV/μs 數據速率:25Mbps 傳播延遲 tpLH / tpHL(最大值):45ns,45ns 脈寬失真(最大):3ns 上升/下降時間(典型值):2.5ns,2.5ns 電壓 - 電源:3 V ~ 5.5 V 工作溫度:-55°C ~ 125°C 封裝/外殼:8-SOIC(0.154",3.90mm 寬) 供應商器件封裝:8-SOIC 標準包裝:98
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