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參數資料
| 型號： | ADV7123 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | CMOS, 240 MHz Triple 10-Bit High Speed Video DAC(240MHz三通道10位高速視頻D/A轉換器) |
| 中文描述： | 的CMOS，240 MHz的三路10位高速視頻DAC（240MHz的三通道10位高速視頻的D / A轉換器） |
| 文件頁數： | 7/16頁 |
| 文件大小： | 318K |
| 代理商： | ADV7123 |
ADV7123
–7–
REV. A
3.3 V TIMING–SPECIFICATIONS
1
Parameter
Min
Typ
Max
Units
Condition
ANALOG OUTPUTS
Analog Output Delay, t
6
Analog Output Rise/Fall Time, t
74
Analog Output Transition Time, t
85
Analog Output Skew, t
96
CLOCK CONTROL
f
CLK7
f
CLK7
f
CLK7
Data and Control Setup, t
1
Data and Control Hold, t
2
Clock Pulsewidth High, t
4
Clock Pulsewidth Low t
5
Clock Pulsewidth High t
4
Clock Pulsewidth Low t
5
Clock Pulsewidth High t
4
Clock Pulsewidth Low t
5
Pipeline Delay, t
PD6
PSAVE
Up Time, t
106
7.5
1.0
15
1
ns
ns
ns
ns
2
50
140
240
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
Clock Cycles
ns
50 MHz Grade
140 MHz Grade
240 MHz Grade
1.5
2.5
1.1
1.4
f
MAX
= 240 MHz
f
MAX
= 240 MHz
f
MAX
= 140 MHz
f
MAX
= 140 MHz
f
MAX
= 50 MHz
f
MAX
= 50 MHz
2.85
2.85
8.0
8.0
1.0
1.0
4
1.0
10
NOTES
1
Timing specifications are measured with input levels of 3.0 V (V
) and 0 V (V
IL
) 0 for both 5 V and 3.3 V supplies.
2
These maximum and minimum specifications are guaranteed over this range.
3
Temperature range: T
to T
: –40
°
C to +85
°
C at 50 MHz and 140 MHz, 0
°
C to +70
°
C at 240 MHz.
4
Rise time was measured from the 10% to 90% point of zero to full-scale transition, fall time from the 90% to 10% point of a full-scale transition.
5
Measured from 50% point of full-scale transition to 2% of final value.
6
Guaranteed by characterization.
7
f
CLK
max specification production tested at 125 MHz and 5 V limits specified here are guaranteed by characterization.
Specifications subject to change without notice.
t
2
CLOCK
DATA
NOTES:
1. OUTPUT DELAY (
t
) MEASURED FROM THE 50% POINT OF THE RISING EDGE OF CLOCK
TO THE 50% POINT OF FULL-SCALE TRANSITION.
2. OUTPUT RISE/FALL TIME (
t
7
) MEASURED BETWEEN THE 10% AND 90% POINTS OF FULL-SCALE TRANSITION.
3. TRANSITION TIME (
t
) MEASURED FROM THE 50% POINT OF FULL-SCALE TRANSITION
TO WITHIN 2% OF THE FINAL OUTPUT VALUE.
ANALOG OUTPUTS
(IOR,
IOR
, IOG,
IOG
, IOB,
IOB
)
DIGITAL INPUTS
(R9–R0, G9–G0, B9–B0,
SYNC
,
BLANK
)
t
3
t
4
t
5
t
1
t
8
t
6
t
7
Figure 1. Timing Diagram
(V
AA
= +3.0 V–3.6 V
2
, V
REF
= 1.235 V, R
SET
= 560
V
, C
L
= 10 pF. All specifications T
MIN
to
T
MAX3
unless otherwise noted, T
J
MAX
= 110
8
C)
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相關代理商/技術參數 |
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| ADV7123JST240 | 制造商:Rochester Electronics LLC 功能描述:TRIPLE HIGH SPEED VIDEO DAC I.C. - Bulk 制造商:Analog Devices 功能描述:IC 10-BIT VIDEO DAC |
| ADV7123JST240-REEL | 制造商:Rochester Electronics LLC 功能描述:TRIPLE HIGH SPEED VIDEO DAC I.C. - Tape and Reel 制造商:Analog Devices 功能描述: |
| ADV7123JST330 | 制造商:Rochester Electronics LLC 功能描述:TRIPLE HIGH SPEED VIDEO DAC I.C. - Bulk 制造商:Analog Devices 功能描述:IC 10-BIT VIDEO DAC |
| ADV7123JSTZ240 | 功能描述:IC DAC VIDEO TRPL HI SPD 48-LQFP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 數模轉換器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 設置時間:4µs 位數:12 數據接口:串行 轉換器數目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應商設備封裝:8-uMAX 包裝:管件 輸出數目和類型:2 電壓，單極 采樣率（每秒）:* 產品目錄頁面:1398 (CN2011-ZH PDF) |
| ADV7123JSTZ240 | 制造商:Analog Devices 功能描述:D/A Converter (D-A) IC |
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