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參數資料
型號: ADV7170SU
廠商: ANALOG DEVICES INC
元件分類: 顏色信號轉換
英文描述: Digital PAL/NTSC Video Encoder with 10-Bit SSAF⑩ and Advanced Power Management
中文描述: COLOR SIGNAL ENCODER, PQFP44
封裝: PLASTIC, TQFP-44
文件頁數: 14/55頁
文件大小: 754K
代理商: ADV7170SU
ADV7170/ADV7171
–14–
REV. 0
COMPOSITE
VIDEO
e.g., VCR
OR CABLE
M
U
X
HSYNC
FIELD/
VSYNC
ADV7170/ADV7171
CLOCK
GREEN/LUMA/Y
RED/CHROMA/V
BLUE/COMPOSITE/U
COMPOSITE
P7–P0
SCRESET/RTC
MPEG
DECODER
VIDEO
DECODER
(e.g., ADV7185)
H/LTRANSITION
COUNT START
LOW
128
RTC
TIME SLOT: 01
14
6768
NOT USED IN
ADV7175A/ADV7176A
19
VALID
SAMPLE
INVALID
SAMPLE
FSCPLL INCREMENT
1
8/LLC
5 BITS
RESERVED
SEQUENCE
BIT
RESET
BIT
3
RESERVED
4 BITS
RESERVED
21
0
13
14 BITS
RESERVED
NOTES:
1
F
SC
PLL INCREMENT IS 22 BITS LONG, VALUE LOADED INTO ADV7175A/ADV7176A FSC DDS REGISTER IS
F
SC
PLL INCREMENTS BITS 21:0 PLUS BITS 0:9 OF SUBCARRIER FREQUENCY REGISTERS. ALL ZEROS SHOULD
BE WRITTEN TO THE SUBCARRIER FREQUENCY REGISTERS OF THE ADV7170/ADV7171.
2
SEQUENCE BIT
PAL: 0 = LINE NORMAL, 1 = LINE INVERTED
NTSC: 0 = NO CHANGE
3
RESET BIT
RESET ADV7175A/ADV7176A’s DDS
0
Figure 19. RTC Timing and Connections
Vertical Blanking Data Insertion
It is possible to allow encoding of incoming YCbCr data on those lines of VBI that do not bear line sync or pre-/post-equalization
pulses (see Figures 21 to 32). This mode of operation is called “Partial Blanking” and is selected by setting MR31 to 1. It allows the
insertion of any VBI data (Opened VBI) into the encoded output waveform. This data is present in digitized incoming YCbCr data
stream (e.g., WSS data, CGMS, VPS, etc.). Alternatively, the entire VBI may be blanked (no VBI data inserted) on these lines by
setting MR31 to 0.
The complete VBI is comprised of the following lines:
525/60 Systems, Lines 525 to 21 for Field 1 and Lines 262 to Line 284 for Field 2.
625/50 Systems, Lines 624 to Line 22 and Lines 311 to 335.
The “Opened VBI” consists of:
525/60 Systems, Lines 10 to 21 for Field 1 and second half of Line 273 to Line 284 for Field 2.
625/50 Systems, Line 7 to Line 22 and Lines 319 to 335.
Mode 0 (CCIR-656): Slave Option
(Timing Register 0 TR0 = X X X X X 0 0 0)
The ADV7170/ADV7171 is controlled by the SAV (Start Active Video) and EAV (End Active Video) time codes in the pixel data.
All timing information is transmitted using a 4-byte synchronization pattern. A synchronization pattern is sent immediately before
and after each line during active picture and retrace. Mode 0 is illustrated in Figure 20. The
HSYNC
, FIELD/
VSYNC
and
BLANK
(if not used) pins should be tied high during this mode.
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ADV7171KS Digital PAL/NTSC Video Encoder with 10-Bit SSAF⑩ and Advanced Power Management
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相關代理商/技術參數
參數描述
ADV7171 制造商:AD 制造商全稱:Analog Devices 功能描述:Digital PAL/NTSC Video Encoder with 10-Bit SSAF⑩ and Advanced Power Management
ADV7171KS 制造商:Analog Devices 功能描述:Video Encoder 4DAC 10-Bit 44-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:ADVANCED NTSC/PAL ENCODER I.C. - Bulk 制造商:Analog Devices 功能描述:IC VIDEO ENCODER 制造商:Panasonic Industrial Company 功能描述:IC
ADV7171KS-REEL 制造商:Analog Devices 功能描述:Video Encoder 4DAC 10-Bit 44-Pin MQFP T/R 制造商:Rochester Electronics LLC 功能描述:ADVANCED NTSC/PAL ENCODER I.C. - Tape and Reel
ADV7171KSU 制造商:Analog Devices 功能描述:Video Encoder 4DAC 10-Bit 44-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:ADVANCED NTSC/PAL ENCODER - Bulk 制造商:Analog Devices 功能描述:IC VIDEO ENCODER
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