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參數(shù)資料
| 型號： | ADV7171SU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | Digital PAL/NTSC Video Encoder with 10-Bit SSAF⑩ and Advanced Power Management |
| 中文描述： | COLOR SIGNAL ENCODER, PQFP44 |
| 封裝： | PLASTIC, TQFP-44 |
| 文件頁數(shù)： | 9/55頁 |
| 文件大小： | 754K |
| 代理商： | ADV7171SU |
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ADV7170/ADV7171
–9–
REV. 0
PIN FUNCTION DESCRIPTIONS
Input/
Output
Mnemonic
Function
P15–P0
I
8-Bit 4:2:2 Multiplexed YCrCb Pixel Port (P7–P0) or 16-Bit YCrCb Pixel Port (P15–P0).
P0 represents the LSB.
TTL Clock Input. Requires a stable 27 MHz reference Clock for standard operation. Alter-
natively, a 24.52 MHz (NTSC) or 29.5 MHz (PAL) can be used for square pixel operation.
HSYNC
(Modes 1 and 2) Control Signal. This pin may be configured to output (Master
Mode) or accept (Slave Mode) Sync signals.
Dual Function FIELD (Mode 1) and
VSYNC
(Mode 2) Control Signal. This pin may be
configured to output (Master Mode) or accept (Slave Mode) these control signals.
Video Blanking Control Signal. The pixel inputs are ignored when this is Logic Level “0.”
This signal is optional.
This pin can be configured as an input by setting MR22 and MR21 of Mode Register 2. It
can be configured as a subcarrier reset pin, in which case a high-to-low transition on this pin
will reset the subcarrier to Field 0. Alternatively, it may be configured as a Real-Time
Control (RTC) input.
Voltage Reference Input for DACs or Voltage Reference Output (1.235 V).
A 150
resistor connected from this pin to GND is used to control full-scale amplitudes of
the video signals.
Compensation Pin. Connect a 0.1
μ
F Capacitor from COMP to V
AA
. For Optimum Dynamic
Performance in low power mode, the value of the COMP capacitor can be lowered to as low
as 2.2 nF.
PAL/NTSC Composite Video Output. Full-Scale Output is 180 IRE (1286 mV) for NTSC
and 1300 mV for PAL.
RED/S-Video C/V Analog Output.
GREEN/S-Video Y/Y Analog Output
BLUE/Composite/U Analog Output.
MPU Port Serial Interface Clock Input.
MPU Port Serial Data Input/Output.
TTL Address Input. This signal set up the LSB of the MPU address.
The input resets the on chip timing generator and sets the ADV7170/ADV7171 into default
mode. This is NTSC operation, Timing Slave Mode 0, 8 Bit Operation, 2
×
Composite and
S Video out and DAC B powered ON and DAC D powered OFF.
Teletext Data/Defaults to V
AA
when Teletext not Selected (enables backward compatibility to
ADV7175/ADV7176).
Teletext Data Request Signal/ Defaults to GND
when Teletext not Selected (enables back-
ward compatibility to ADV7175/ADV7176).
Power Supply (+3 V to +5 V).
Ground Pin.
CLOCK
I
HSYNC
I/O
FIELD/
VSYNC
I/O
BLANK
I/O
SCRESET/RTC
I
V
REF
R
SET
I/O
I
COMP
O
DAC A
O
DAC C
DAC D
DAC B
SCLOCK
SDATA
ALSB
RESET
O
O
O
I
I/O
I
I
TTX/V
AA
I
TTXREQ/GND
O
V
AA
GND
P
G
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| ADV7171* | Digital PAL/NTSC Video Encoder with 10-Bit SSAF and Advanced Power Management |
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相關(guān)代理商/技術(shù)參數(shù) |
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| ADV7171WBSZ-REEL | 制造商:AD 制造商全稱:Analog Devices 功能描述:Digital PAL/NTSC Video Encoder |
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| ADV7172KST | 制造商:AD 制造商全稱:Analog Devices 功能描述:Digital PAL/NTSC Video Encoder with Six DACs 10 Bits, Color Control and Enhanced Power Management |
| ADV7172KST-REEL | 制造商:Analog Devices 功能描述: |
| ADV7172KSTZ | 制造商:Analog Devices 功能描述: |
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