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參數(shù)資料
| 型號： | ADV7174BCP-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | Chip Scale PAL/NTSC Video Encoder with Advanced Power Management |
| 中文描述： | COLOR SIGNAL ENCODER, QCC40 |
| 封裝： | 6 X 6 MM, MO-220VJJD-2, LFCSP-40 |
| 文件頁數(shù)： | 30/52頁 |
| 文件大小： | 488K |
| 代理商： | ADV7174BCP-REEL |
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ADV7174/ADV7179
MODE REGISTER 2 (MR2)
Bits:
Address:
Rev. A | Page 30 of 52
MR27–MR20
SR4–SR0 = 02H
Mode Register 2 is an 8-bit-wide register. Figure 40 shows the various operations under the control of Mode Register 2. This register can
be read from as well as written to.
MR21
MR27
MR22
MR23
MR26
MR25
MR24
MR20
CHROMINANCE
CONTROL
MR24
0
1
ENABLE COLOR
DISABLE COLOR
GENLOCK CONTROL
x
0
DISABLE GENLOCK
ENABLE SUBCARRIER
RESET PIN
ENABLE RTC PIN
1
0
1
1
MR22 MR21
LOW POWER MODE
0
1
DISABLE
ENABLE
MR26
SQUARE PIXEL
CONTROL
MR20
0
1
DISABLE
ENABLE
BURST
CONTROL
0
1
ENABLE BURST
DISABLE BURST
MR25
MR27
ACTIVE VIDEO LINE
DURATION
MR23
0
1
720 PIXELS
710 PIXELS/702 PIXELS
RESERVED
0
Figure 40. Mode Register 2
Table 11. MR2 Bit Description
Bit Name
Square Pixel Control
Bit No.
MR20
Description
This bit is used to set up square pixel mode. This is available in slave mode only. For NTSC, a
24.5454 MHz clock must be supplied. For PAL, a 29.5 MHz clock must be supplied.
These bits control the genlock feature of the ADV7174/ ADV7179. Setting MR21 to Logic 1
configures the SCRESET/RTC pin as an input. Setting MR22 to Logic 0 configures the
SCRESET/RTC pin as a subcarrier reset input. Therefore, the subcarrier will reset to Field 0
following a low-to-high transition on the SCRESET/RTC pin. Setting MR22 to Logic 1 configures
the SCRESET/RTC pin as a real-time control input.
This bit switches between two active video line durations. A 0 selects CCIR REC601 (720 pixels
PAL/NTSC), and a 1 selects ITU-R.BT470 standard for active video duration (710 pixels NTSC
and 702 pixels PAL).
This bit enables the color information to be switched on and off the video output.
This bit enables the burst information to be switched on and off the video output.
This bit enables the lower power mode of the ADV7174/ADV7179. This reduces the DAC
current by 45%.
A Logic 0 must be written to this bit.
Genlock Control
MR22–MR21
Active Video Line Duration
MR23
Chrominance Control
Burst Control
Low Power Mode
MR24
MR25
MR26
Reserved
MR27
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7174KCP | Chip Scale PAL/NTSC Video Encoder with Advanced Power Management |
| ADV7174KCP-REEL | Chip Scale PAL/NTSC Video Encoder with Advanced Power Management |
| ADV7179 | Chip Scale PAL/NTSC Video Encoder with Advanced Power Management |
| ADV7179BCP | Chip Scale PAL/NTSC Video Encoder with Advanced Power Management |
| ADV7179BCP-REEL | Chip Scale PAL/NTSC Video Encoder with Advanced Power Management |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7174KCP | 制造商:AD 制造商全稱:Analog Devices 功能描述:Chip Scale PAL/NTSC Video Encoder with Advanced Power Management |
| ADV7174KCP-REEL | 制造商:AD 制造商全稱:Analog Devices 功能描述:Chip Scale PAL/NTSC Video Encoder with Advanced Power Management |
| ADV7174KCPZ-REEL | 功能描述:Video Encoder IC Digital Cameras, Mobile Phones, Portable Video 40-LFCSP-WQ (6x6) 制造商:analog devices inc. 系列:- 包裝:帶卷（TR） 零件狀態(tài):有效 類型:視頻編碼器 應(yīng)用:數(shù)碼相機(jī)，手機(jī)，便攜式視頻 電壓 - 電源，模擬:2.8 V，3.3 V 電壓 - 電源，數(shù)字:- 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤，CSP 供應(yīng)商器件封裝:40-LFCSP-WQ（6x6） 標(biāo)準(zhǔn)包裝:2,500 |
| ADV7174WBCPZ | 功能描述:IC ENCODER NTSC/PAL VID 40LFCSP 制造商:analog devices inc. 系列:- 包裝:托盤 零件狀態(tài):停產(chǎn) 類型:視頻編碼器 應(yīng)用:數(shù)碼相機(jī)，手機(jī)，便攜式視頻 電壓 - 電源，模擬:2.8 V，3.3 V 電壓 - 電源，數(shù)字:- 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤，CSP 供應(yīng)商器件封裝:40-LFCSP-WQ（6x6） 標(biāo)準(zhǔn)包裝:1 |
| ADV7174WBCPZ-REEL | 功能描述:Video Encoder IC Digital Cameras, Mobile Phones, Portable Video 40-LFCSP-WQ (6x6) 制造商:analog devices inc. 系列:- 包裝:帶卷（TR） 零件狀態(tài):有效 類型:視頻編碼器 應(yīng)用:數(shù)碼相機(jī)，手機(jī)，便攜式視頻 電壓 - 電源，模擬:2.8 V，3.3 V 電壓 - 電源，數(shù)字:- 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤，CSP 供應(yīng)商器件封裝:40-LFCSP-WQ（6x6） 標(biāo)準(zhǔn)包裝:2,500 |
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