- 您現在的位置：買賣IC網 > PDF目錄374047 > ADV7183BBSTZ (ANALOG DEVICES INC) Multiformat SDTV Video Decoder PDF資料下載
參數資料
| 型號： | ADV7183BBSTZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顏色信號轉換 |
| 英文描述： | Multiformat SDTV Video Decoder |
| 中文描述： | COLOR SIGNAL DECODER, PQFP80 |
| 封裝： | LEAD FREE, MS-026-BEC, LQFP-80 |
| 文件頁數： | 23/100頁 |
| 文件大?。?/td> | 844K |
| 代理商： | ADV7183BBSTZ |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁當前第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁
ADV7183B
SRLS Select Raw Lock Signal, Address 0x51[6]
Using the SRLS bit, the user can choose between two sources for
determining the lock status (per Bits[1:0] in the Status 1 register).
Rev. B | Page 23 of 100
The time_win signal is based on a line-to-line evaluation of
the horizontal synchronization pulse of the incoming video.
It reacts quite quickly.
The free_run signal evaluates the properties of the
incoming video over several fields and takes vertical
synchronization information into account.
Setting SRLS to 0 (default) selects the free_run signal.
Setting SRLS to 1 selects the time_win signal.
FSCLE F
SC
Lock Enable, Address 0x51[7]
The FSCLE bit allows the user to choose whether the status of
the color subcarrier loop is taken into account when the overall
lock status is determined and presented via Bits[1:0] in Status
Register 1. This bit must be set to 0 when operating in YPrPb
component mode to generate a reliable HLOCK status bit.
Setting
FSCLE to 0 (default) makes the overall lock status
dependent on only horizontal sync lock.
Setting
FSCLE to 1 makes the overall lock status dependent on
horizontal sync lock and F
SC
lock.
VS_Coast[1:0] Address 0xF9[3:2]
These bits are used to set VS free-run (coast) frequency.
Table 19. VS_COAST[1:0] Function
VS_COAST[1:0]
Description
00 (default)
Auto coast mode—follows VS
frequency from last video input
01
Forces 50 Hz coast mode
10
Forces 60 Hz coast mode
11
Reserved
CIL[2:0] Count Into Lock, Address 0x51[2:0]
CIL[2:0] determines the number of consecutive lines for which
the lock condition must be true before the system switches into
the locked state, and reports this via Status 0[1:0]. It counts the
value in lines of video.
Table 20. CIL Function
CIL[2:0]
000
001
010
011
100 (default)
101
110
111
Description
1
2
5
10
100
500
1000
100000
COL[2:0] Count Out-of-Lock, Address 0x51[5:3]
COL[2:0] determines the number of consecutive lines for which
the out-of-lock condition must be true before the system switches
into unlocked state, and reports this via Status 0[1:0]. It counts
the value in lines of video.
Table 21. COL Function
COL[2:0]
000
001
010
011
100 (default)
101
110
111
COLOR CONTROLS
These registers allow the user to control the picture appearance,
including control of the active data in the event of video being
lost. These controls are independent of any other controls. For
instance, brightness control is independent from picture clamp-
ing, although both controls affect the signal’s dc level.
Description
1
2
5
10
100
500
1000
100000
CON[7:0] Contrast Adjust, Address 0x08[7:0]
This allows the user to adjust the contrast of the picture.
Table 22. CON Function
CON[7:0]
Description
0x80 (default)
Gain on luma channel = 1
0x00
Gain on luma channel = 0
0xFF
Gain on luma channel = 2
SD_SAT_Cb[7:0] SD Saturation Cb Channel,
Address 0xE3[7:0]
This register allows the user to control the gain of the Cb
channel only. The user can adjust the saturation of the picture.
Table 23. SD_SAT_Cb Function
SD_SAT_Cb[7:0]
Description
0x80 (default)
Gain on Cb channel = 0 dB
0x00
Gain on Cb channel = 42 dB
0xFF
Gain on Cb channel = +6 dB
相關PDF資料 |
PDF描述 |
|---|---|
| ADV7183BKSTZ | Multiformat SDTV Video Decoder |
| ADV7183KST | Advanced Video Decoder with 10-Bit ADC and Component Input Support |
| AD7183 | Advanced Video Decoder with 10-Bit ADC and Component Input Support |
| ADV7185 | Professional NTSC/PAL Video Decoder with 10-Bit CCIR656 Output |
| ADV7185KST | Professional NTSC/PAL Video Decoder with 10-Bit CCIR656 Output |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADV7183BKST | 制造商:Analog Devices 功能描述:MULTIFORMAT SDTV VID DECODER 80LQFP - Bulk |
| ADV7183BKSTZ | 功能描述:IC VIDEO DECODER NTSC 80-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉換器 系列:- 產品變化通告:Development Systems Discontinuation 26/Apr/2011 標準包裝:1 系列:- 類型:編碼器 應用:DVB-S.2 系統 電壓 - 電源，模擬:- 電壓 - 電源，數字:- 安裝類型:- 封裝/外殼:模塊 供應商設備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| ADV7183KST | 制造商:Analog Devices 功能描述:Video Decoder 2ADC 10-Bit 80-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:VIDEO DECODER I.C. - Bulk |
| ADV7184 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder with Fast Switch Overlay Support |
| ADV7184BSTZ | 功能描述:IC DECODER VID SDTV MULTI 80LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉換器 系列:- 產品變化通告:Development Systems Discontinuation 26/Apr/2011 標準包裝:1 系列:- 類型:編碼器 應用:DVB-S.2 系統 電壓 - 電源，模擬:- 電壓 - 電源，數字:- 安裝類型:- 封裝/外殼:模塊 供應商設備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
發布緊急采購，3分鐘左右您將得到回復。