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參數(shù)資料
型號(hào): ADV7188BSTZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 1/112頁(yè)
文件大小: 0K
描述: IC DECODER VID MULTIFORM 80LQFP
標(biāo)準(zhǔn)包裝: 1
類型: 視頻解碼器
應(yīng)用: 機(jī)頂盒,視頻播放器,錄音機(jī)
電壓 - 電源,模擬: 3.15 V ~ 3.45 V
電壓 - 電源,數(shù)字: 1.65 V ~ 2 V
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應(yīng)商設(shè)備封裝: 80-LQFP(14x14)
包裝: 托盤
Multiformat SDTV Video Decoder
with Fast Switch Overlay Support
ADV7188
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2007 Analog Devices, Inc. All rights reserved.
FEATURES
Multiformat video decoder supports NTSC (J/M/4.43),
PAL (B/D/G/H/I/M/N), SECAM
Integrates four 54 MHz, Noise Shaped Video (NSV), 12-bit ADCs
SCART fast blank support
Clocked from a single 28.63636 MHz crystal
Line-locked clock-compatible (LLC)
Adaptive Digital Line Length Tracking (ADLLT), signal
processing, and enhanced FIFO management give
mini-TBC functionality
5-line adaptive comb filters
Proprietary architecture for locking to weak, noisy, and
unstable video sources such as VCRs and tuners
Subcarrier frequency lock and status information output
Integrated automatic gain control (AGC) with adaptive peak
white mode
Macrovision copy protection detection
Chroma transient improvement (CTI)
Digital noise reduction (DNR)
Multiple programmable analog input formats
CVBS (composite video)
Y/C (S-video)
YPrPb (component) (VESA, MII, SMPTE, and BETACAM)
12 analog video input channels
Integrated antialiasing filters
Programmable interrupt request output pin
Automatic NTSC/PAL/SECAM identification
Digital output formats (8-bit, 10-bit, 16-bit, or 20-bit)
ITU-R BT.656 YCrCb 4:2:2 output + HS, VS, and FIELD
0.5 V to 1.6 V analog signal input range
Differential gain: 0.4% typical
Differential phase: 0.4° typical
Programmable video controls
Peak white/hue/brightness/saturation/contrast
Integrated on-chip video timing generator
Free-run mode (generates stable video output with no input)
VBI decode support for close captioning (including Gemstar
1×/2× (XDS)), WSS, CGMS, teletext, VITC, VPS
Power-down mode
2-wire serial MPU interface (I2C compatible)
3.3 V analog, 1.8 V digital core, 3.3 V input/output supply
Industrial temperature grade: 40°C to +85°C
80-lead, Pb-free LQFP
APPLICATIONS
High end DVD recorders
Video projectors
HDD-based PVRs/DVDRs
LCD TVs
Set-top boxes
Professional video products
AVR receiver
GENERAL DESCRIPTION
The ADV7188 integrated video decoder automatically detects and
converts standard analog baseband television signals compatible
with worldwide NTSC, PAL, and SECAM standards into
4:2:2 component video data compatible with 20-/16-/10-/8-bit
CCIR 601/CCIR 656.
The advanced, highly flexible digital output interface enables
performance video decoding and conversion in line-locked,
clock-based systems. This makes the device ideally suited for a
broad range of applications with diverse analog video character-
istics, including tape-based sources, broadcast sources, security
and surveillance cameras, and professional systems.
The accurate 12-bit ADC provides professional quality video
performance and is unmatched. This allows true 10-bit
resolution in the 10-bit output mode.
The 12 analog input channels accept standard composite, S-video,
and component video signals in an extensive number of
combinations.
AGC and clamp-restore circuitry allow an input video signal
peak-to-peak range of 0.5 V to 1.6 V. Alternatively, these can be
bypassed for manual settings.
The fixed 54 MHz clocking of the ADCs and datapath for all
modes allows very precise, accurate sampling and digital filtering.
The line-locked clock output allows the output data rate, timing
signals, and output clock signals to be synchronous, asynchronous,
or line locked even with ±5% variation in line length. The output
control signals allow glueless interface connections in most
applications. The ADV7188 modes are set up over a 2-wire,
serial, bidirectional port (I2C compatible).
SCART and overlay functionality are enabled by the ability of
the ADV7188 to process CVBS and standard definition RGB
signals simultaneously. Signal mixing is controlled by the fast
blank pin. The ADV7188 is fabricated in a 3.3 V CMOS process.
Its monolithic CMOS construction ensures greater functionality
with lower power dissipation. It is packaged in a small, Pb-free,
80-lead LQFP.
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