- 您現在的位置：買賣IC網 > PDF目錄374047 > ADV7303A (Analog Devices, Inc.) Sand Paper; Abrasive Grade:A VFN; Color:Maroon; Pack Quantity:4; Roll Length:30ft; Width:3" PDF資料下載
參數資料
| 型號： | ADV7303A |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Sand Paper; Abrasive Grade:A VFN; Color:Maroon; Pack Quantity:4; Roll Length:30ft; Width:3" |
| 中文描述： | 多格式統計，逐行掃描/ HDTV視頻編碼器與六11位DAC |
| 文件頁數： | 16/68頁 |
| 文件大?。?/td> | 1177K |
| 代理商： | ADV7303A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁
REV. A
–16–
ADV7302A/ADV7303A
Table I. Power Mode Register
Subaddress
Register
Bit Description
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register Setting
Reset
00h
Power Mode Register
Sleep Mode
1
0
Sleep Mode Off
1
Sleep Mode On
PLL and Oversampling
Control
0
PLL On
1
PLL Off
DAC F: Power On/Off
0
DAC F Off
1
DAC F On
DAC E: Power On/Off
0
DAC E Off
1
DAC E On
DAC D: Power On/Off
0
DAC D Off
1
DAC D On
DAC C: Power On/Off
0
DAC C Off
1
DAC C On
DAC B: Power On/Off
0
DAC B Off
1
DAC B On
DAC A: Power On/Off
0
DAC A Off
1
DAC A On
Fch
NOTES
1
When enabled, the current consumption is reduced to
μ
A level. All DACs and the internal PLL cct are disabled. I
2
C registers can be read from and written to.
2
This control allows the internal PLL circuit to be powered down and the oversampling to be switched off.
Table II. Input Mode Register
Subaddress Register
Bit Description
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register Setting
Reset
01h
Input Mode Register
0
Disabled
38h
1
Enabled
Reserved
0
Zero must be written
to this bit.
Video input data starts
with a Y0 bit. Only for
PS Interleaved Mode.
Video input data starts
with a Cb0 bit.
0
1
0
1
Must be set if the
phase delay between
the two input clocks is
<9.25 ns or >27.75 ns.
Only if two input
clocks are used.
SD Input Only
0
0
0
0
0
1
PS Input Only
0
1
0
HDTV Input Only
0
1
1
SD and PS (16-Bit)
1
0
0
SD and PS (8-Bit)
1
0
1
SD and HDTV (SD
Oversampled)
SD and HDTV
(HDTV Oversampled)
1
1
0
1
1
1
PS 54 MHz Input
Reserved
0
Zero must be written
to this bit.
BTA T-1004 Compatibility
Pixel Align
Clock Align
Input Mode
相關PDF資料 |
PDF描述 |
|---|---|
| ADV7303AKST | Sand Paper; Abrasive Grade:T; Color:White; Pack Quantity:3; Roll Length:30ft; Width:4" |
| ADV7310 | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
| ADV7310KST | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
| ADV7311 | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
| ADV7311KST | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADV7303AKST | 制造商:Rochester Electronics LLC 功能描述:150MHZ HD 108MHZ PROG SCAN 11BIT ENC I.C - Bulk 制造商:Analog Devices 功能描述: |
| ADV73045701 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV73045702 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV73045703 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV73045704 | 制造商:LG Corporation 功能描述:Frame Assembly |
發布緊急采購，3分鐘左右您將得到回復。