- 您現在的位置：買賣IC網 > PDF目錄374048 > ADV7391EBZ (Analog Devices, Inc.) Low Power, Chip Scale 10-Bit SD/HD Video Encoder PDF資料下載
參數資料
| 型號： | ADV7391EBZ |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Low Power, Chip Scale 10-Bit SD/HD Video Encoder |
| 中文描述： | 低功耗，芯片尺寸10位標清/高清視頻編碼器 |
| 文件頁數： | 45/96頁 |
| 文件大?。?/td> | 1209K |
| 代理商： | ADV7391EBZ |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁當前第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁
ADV7390/ADV7391/ADV7392/ADV7393
FEATURES
OUTPUT OVERSAMPLING
The ADV739x include an on-chip phase-locked loop (PLL) that
allows for oversampling of SD, ED, and HD video data. By
default, the PLL is disabled. The PLL can be enabled using
Subaddress 0x00, Bit 1 = 0.
Table 35 shows the various oversampling rates supported in the
ADV739x.
ED/HD NONSTANDARD TIMING MODE
Subaddress 0x30, Bits[7:3] = 00001
For any ED/HD input data that does not conform to
the standards listed in the ED/HD input mode table
(Subaddress 0x30, Bits[7:3]), the ED/HD nonstandard
timing mode can be used to interface to the ADV739x.
ED/HD nonstandard timing mode can be enabled by
setting Subaddress 0x30, Bits[7:3] to 00001.
A clock signal must be provided on the CLKIN pin. HSYNC
and VSYNC must be toggled by the user to generate the
appropriate horizontal and vertical synchronization pulses on
the analog output from the encoder. Figure 61 illustrates the
Rev. 0 | Page 45 of 96
various output levels that can be generated. Table 36 lists the
transitions required to generate the various output levels.
Embedded EAV/SAV timing codes are not supported in
ED/HD nonstandard timing mode.
The user must ensure that appropriate pixel data is applied to
the encoder where the blanking level is expected at the output.
Macrovision (ADV7390/ADV7392 only) and output
oversampling are not available in ED/HD nonstandard timing
mode. The PLL must be disabled (Subaddress 0x00, Bit 1 = 1) in
ED/HD nonstandard timing mode.
ACTIVE VIDEO
ANALOG
a
b
c
b
b
a = TRI-LEVEL SYNCHRONIZATION PULSE LEVEL.
b = BLANKING LEVEL/ACTIVE VIDEO LEVEL.
BLANKING LEVEL
0
Figure 61. ED/HD Nonstandard Timing Mode Output Levels
Table 35. Output Oversampling Modes and Rates
Input Mode
(0x01, Bits[6:4])
000
SD
000
SD
000
SD
001/010
ED
001/010
ED
001/010
ED
001/010
HD
001/010
HD
001/010
HD
111
ED (at 54 MHz)
111
ED (at 54 MHz)
111
ED (at 54 MHz)
PLL and Oversampling
Control (0x00, Bit 1)
1
0
0
1
0
0
1
0
0
1
0
0
SD/ED Oversample Rate
Select (0x0D, Bit 3)
x
1
0
x
1
0
x
x
x
x
1
0
HD Oversample Rate
Select (0x31, Bit 1)
x
x
x
x
x
x
x
1
0
x
x
x
Oversampling Mode
and Rate
SD (2×)
SD (8×)
SD (16×)
ED (1×)
ED (4×)
ED (8×)
HD (1×)
HD (2×)
HD (4×)
ED (@ 54 MHz) (1×)
ED (@ 54 MHz) (4×)
ED (@ 54 MHz) (8×)
Table 36. ED/HD Nonstandard Timing Mode Synchronization Signal Generation
Output Level Transition
1
b
→
c
c
→
a
a
→
b
c
→
b
1
a = Tri-level synchronization pulse level; b = blanking level/active video level; c = synchronization pulse level. See Figure 61.
2
If VSYNC = 1, it should transition to 0. If VSYNC = 0, it should remain at 0. If tri-level synchronization pulse generation is not required, VSYNC should always be 0.
HSYNC
1
→
0
0
0
→
1
0
→
1
VSYNC
1
→
0 or 0
2
0
→
1
1
0
相關PDF資料 |
PDF描述 |
|---|---|
| ADV7392 | Low Power, Chip Scale 10-Bit SD/HD Video Encoder |
| ADV7392BCPZ | Low Power, Chip Scale 10-Bit SD/HD Video Encoder |
| ADV7392BCPZ-REEL | Low Power, Chip Scale 10-Bit SD/HD Video Encoder |
| ADV7392EBZ | Low Power, Chip Scale 10-Bit SD/HD Video Encoder |
| ADV7393 | Low Power, Chip Scale 10-Bit SD/HD Video Encoder |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADV7391WBCPZ | 制造商:Analog Devices 功能描述: |
| ADV7391WBCPZ-RL | 制造商:Analog Devices 功能描述: |
| ADV7392 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, Chip Scale 10-Bit SD/HD Video Encoder |
| ADV7392BCPZ | 制造商:Analog Devices 功能描述: |
| ADV7392BCPZ-3REEL | 功能描述:Video Encoder IC DVD, Game Consoles, Media Players 40-LFCSP-WQ (6x6) 制造商:analog devices inc. 系列:- 包裝:帶卷（TR） 零件狀態:有效 類型:視頻編碼器 應用:DVD，游戲控制臺，媒體播放器 電壓 - 電源，模擬:2.6 V ~ 3.46 V 電壓 - 電源，數字:1.71 V ~ 1.89 V 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤，CSP 供應商器件封裝:40-LFCSP-WQ（6x6） 標準包裝:2,500 |
發布緊急采購，3分鐘左右您將得到回復。