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參數(shù)資料
| 型號(hào)： | ADXL150 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Low Power，65 g to 650 g, Low Noise,Single/Dual Axis Accelerometers(低功耗、測量范圍為65g到650g的低噪音單/雙軸加速器) |
| 中文描述： | 低功耗，65克至650克，低噪聲，單/雙軸加速度（低功耗，測量范圍為65克到650克的低噪音單/雙軸加速器） |
| 文件頁數(shù)： | 13/15頁 |
| 文件大小： | 291K |
| 代理商： | ADXL150 |
ADXL150/ADXL250
–13–
REV. 0
MINIMIZING EMI/RFI
The architecture of the ADXL150/ADXL250, and its use of
synchronous demodulation, makes the device immune to most
electromagnetic (EMI) and radio frequency (RFI) interference.
The use of synchronous demodulation allows the circuit to
reject all signals except those at the frequency of the oscillator
driving the sensor element. However, the ADXL150/ADXL250
have a sensitivity to noise on the supply lines that is near its
internal clock frequency (approximately 100 kHz) or its odd
harmonics and can exhibit baseband errors at the output. These
error signals are the beat frequency signals between the clock
and the supply noise.
Such noise can be generated by digital switching elsewhere in
the system and must be attenuated by proper bypassing. By
inserting a small value resistor between the accelerometer and
its power supply, an RC filter is created. This consists of the
resistor and the accelerometer’s normal 0.1
μ
F bypass capacitor.
For example if R = 20
and C = 0.1
μ
F, a filter with a pole at
80 kHz is created, which is adequate to attenuate noise on the
supply from most digital circuits, with proper ground and sup-
ply layout.
Power supply decoupling, short component leads, physically
small (surface mount, etc.) components and attention to good
grounding practices all help to prevent RFI and EMI problems.
Good grounding practices include having separate analog and
digital grounds (as well as separate power supplies or very good
decoupling) on the printed circuit boards.
INTERFACING THE ADXL150/ADXL250 SERIES
i
MEM
S
ACCELEROMETERS WITH POPULAR ANALOG-TO-
DIGITAL CONVERTERS.
Basic Issues
The ADXL150/ADXL250 Series accelerometers were designed
to drive popular analog-to-digital converters (ADCs) directly.
In applications where both a
±
50
g
full-scale measurement range
and a 1 kHz bandwidth are needed, the V
OUT
terminal of the
accelerometer is simply connected to the V
IN
terminal of the
ADC as shown in Figure 25a. The accelerometer provides its
(nominal) factory preset scale factor of +2.5 V
±
38 mV/
g
which
drives the ADC input with +2.5 V
±
1.9 V when measuring a
50
g
full-scale signal (38 mV/
g
×
50
g
= 1.9V).
As stated earlier, the use of post filtering will dramatically
improve the accelerometer’s low
g
resolution. Figure 25b shows
a simple post filter connected between the accelerometer and
the ADC. This connection, although easy to implement, will
require fairly large values of Cf, and the accelerometer’s signal
will be loaded down (causing a scale factor error) unless the
ADC’s input impedance is much greater than the value of Rf.
ADC input impedance’s range from less than 1.5 k
up to
greater than 15 k
with 5 k
values being typical. Figure 25c is
the preferred connection for implementing low-pass filtering
with the added advantage of providing an increase in scale
factor, if desired.
Calculating ADC Requirements
The resolution of commercial ADCs is specified in bits. In an
ADC, the available resolution equals 2
n
, where
n
is the number
of bits. For example, an 8-bit converter provides a resolution of
2
8
which equals 256. So the full-scale input range of the converter
divided by 256 will equal the smallest signal it can resolve.
In selecting an appropriate ADC to use with our accelerometer
we need to find a device that has a resolution better than the
measurement resolution but, for economy’s sake, not a great
deal better.
For most applications, an 8- or 10-bit converter is appropriate.
The decision to use a 10-bit converter alone, or to use a gain
stage together with an 8-bit converter, depends on which is more
important: component cost or parts count and ease of assembly.
Table II shows some of the tradeoffs involved.
Table II.
8-Bit Converter and 10-Bit (or 12-Bit)
Op Amp Preamp
Converter
Advantages:
Low Cost Converter
No Zero
g
Trim Required
Disadvantages:
Needs Op Amp
Needs Zero
g
Trim
Higher Cost Converter
Adding amplification between the accelerometer and the ADC
will reduce the circuit’s full-scale input range but will greatly
reduce the resolution requirements (and therefore the cost) of
the ADC. For example, using an op amp with a gain of 5.3
following the accelerometer will increase the input drive to the
ADC from 38 mV/
g
to 200 mV/
g
. Since the signal has been
gained up, but the maximum full-scale (clipping) level is still the
same, the dynamic range of the measurement has also been
reduced by 5.3.
Table III. Typical System Resolution Using Some Popular
ADCs Being Driven with and without an Op Amp Preamp
Converter
mV/Bit
(5 V/2
n
)
SF
FS
Range
in
g
’s
System
Resolution
in
g
’s (p-p)
Converter
Type
Preamp in
Gain
2
n
mV/
g
8 Bit
256
19.5 mV
None
38
±
50
0.51
256
19.5 mV
2
76
±
25
0.26
256
19.5 mV
2.63
100
±
20
0.20
256
19.5 mV
5.26
200
±
10
0.10
10 Bit
1,024 4.9 mV
None
38
±
50
0.13
1,024 4.9 mV
2
76
±
25
0.06
1,024 4.9 mV
2.63
100
±
20
0.05
1,024 4.9 mV
5.26
200
±
10
0.02
12 Bit
4,096 1.2 mV
None
38
±
50
0.03
4,096 1.2 mV
2
76
±
25
0.02
4,096 1.2 mV
2.63
100
±
20
0.01
4,096 1.2 mV
5.26
200
±
10
0.006
Table III is a chart showing the required ADC resolution vs. the
scale factor of the accelerometer with or without a gain ampli-
fier. Note that the system resolution specified in the table refers
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| ADXL250 | Low Power，65 g to 650 g, Low Noise,Single/Dual Axis Accelerometers(低功耗、測量范圍為65g到650g的低噪音單/雙軸雙軸加速器) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| ADXL150JQC | 制造商:Analog Devices 功能描述: |
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