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參數資料
| 型號： | AG1171 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | +3.3V / +5.0V Low Power Ringing SLIC |
| 中文描述： | 3.3 / 5.0V低功耗振鈴用戶接口 |
| 文件頁數： | 7/16頁 |
| 文件大小： | 228K |
| 代理商： | AG1171 |
V1.0 Dec 2006
Data Sheet
Ag1171
+3.3V / +5.0V Low Power Ringing SLIC
Condition 1 - DC operation
Signal
Notes
INPUT RM
1
0
No ringing
OUTPUT SHK
1
0
Off hook detected
Off Hook
10ms
Condition 2 - Ringing On-hook
RM
1
0
(input)
1
0
SHK
1
0
Condition 3 - Ringing/Off-hook
A
B
from F/R..
As long as the telephone is off hook, SHK will remain high.
1 sec
3 sec
1 sec
3 sec
BE DE-BOUNCED FOR
F/R
(point B), and the ringing cadence should be removed
NOTE: SHK SHOULD
The phone goes off hook, and SHK is detected at point A
(leading edge). RM must be switched low in <500ms
Figure 3: Ringing Signal Waveforms
5.4. Power Down and Synchronisation
The DC/DC converter can be switched off by applying a logic (L) level to the PD input. The
SLIC takes 50ms to power up from this state. Logic outputs are not valid during this time.
When using the power down function, it is recommended that the SLIC is polled (powered
up periodically) to check for SHK (the subscriber has gone off-hook). If Power Down mode
is not required, the PD pin should be left open circuit. The PD input should not be taken to
a logic (H) as this may damage the SLIC. Connecting to PD via a diode will ensure it is
never taken (H). NOTE: This is a sensitive node, keep connections very short.
The DC/DC has an internal oscillator. If desired, the oscillator frequency may be
synchronised with an external clock for EMI reasons. To do this, a 64kHz square wave
(with 50:50 mark space) should be inputted to the PD pin. See Applications Note: AN1171-
1, for further details.
Silver Telecom 2006
7
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