
V1.4 February 2005
Data Sheet
Ag2410
HIGH PERFORMANCE QUAD TRUNK
by the Ag2410 the device protection is dependent upon
regulatory standards in the market in which the
equipment is deployed. Some examples are given
below, but these are not exhaustive.
On-Hook is becoming increasingly common, whether
for Caller Line I.D. or for telemetry purposes. The
Ag2410 can receive signals On-Hook, presenting a
high impedance to the line, i.e. while drawing a very
small current (5
μ
A approx) from the line.
4.1
FCC Pt 68 Requirements.
3.5
Ringer Load Networks
To withstand the FCC Pt68 longitudinal voltage surge
of 1500V no protection is required as the barrier will
withstand 1500V peak voltage to GND.
To withstand the FCC Pt68 metallic surges at 800V
requires a 130V AC varistor (which clamps at 300V
which is the rating of the loop switch transistor). A
14mm device should be used to withstand the two
100A 10/560us surges.
Examples of suitable devices are:-
Joyin JVR-14N201K;
Walsin VZ14D201KBS
Note: If varistors to ground are used for added
protection (e.g. more than 1500V may be seen in the
The “dummy ringer” is usually a capacitive/resistive
load which is connected across TIP/RING. During a
call it is of sufficiently high impedance not to affect the
operation of the interface. The dummy ringer is
integral to the Ag2410, and is suitable for CTR21
(Europe), USA and Asia.
For other dummy ringer requirements not covered in
this datasheet, please contact Silver Telecom, or their
local representative.
4.0
Device Protection.
As with many of the requirements which must be met
C14
Circuit
DMa
1
TIP
1
DMa
2
TIP
2
DMa
3
TIP
3
DMa
4
TIP
4
RING
2
RING
3
RING
4
RING
1
0V
R1
R2
R4
CODEC
Interface
V
CC
(as required by the QSLAC)
C15-C18 = 100uF
upon precise application
5V
C7
C8
Z
b4
V
IN4
LSC
4
R12
VOUT
4
C3
4
C13
R16
C1
C2
Z
b1
V
IN1
LSC
1
VOUT
1
C3
1
0V
C3
C4
Z
b2
V
IN2
LSC
2
R6
VOUT
2
C3
2
C10
R14
C5
C6
Z
b3
V
IN3
LSC
3
R7
VOUT
3
C3
3
C11
GND
+
T E L E C O M
Silver
V
REF1
Protection Circuit
+
Protection Circuit
Protection Circuit
Protection Circuit
V
REF2
R3
V
REF3
V
REF4
0V
C15
0V
C16
0V
C17
0V
C18
0V
0V
0V
C9
R13
R5
R9
R10
R11
R15
R6
C12
+
+
+
Ag2410
Quad
Trunk
DMb
1
DMb
2
DMb
3
DMb
4
AMD
QSLAC
Processor
For 600R line and balance impedance:
R1-4 = 270k
R5-R8 = 51k
R9-12 = 0
R13-16 = 36k
C1-8, C13 = 100nF
C9-12 = 47pF
C14 = 10uF
Protection circuit depends
V
OUT4
RS
4
VIN
4
CD1
4
V
OUT1
RS
1
VIN
1
CD1
1
V
OUT2
RS
2
VIN
2
CD1
2
V
OUT3
RS
3
VIN
3
CD1
3
Figure 4: A 4 Channel Circuit Using the AMD QSLAC
Silver Telecom 2005
Page 6