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參數資料
| 型號： | AM29DL323CB120 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory |
| 中文描述： | 32兆位（4個M × 8位/ 2米x 16位），3.0伏的CMOS只，同時作業快閃記憶體 |
| 文件頁數： | 1/52頁 |
| 文件大小： | 363K |
| 代理商： | AM29DL323CB120 |
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ADVANCE INFORMATION
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Refer to AMD’s Website (www.amd.com) for the latest information.
Publication#
21534
Issue Date:
January 1999
Rev:
C
Amendment/
+1
Am29DL322C/Am29DL323C
32 Megabit (4 M x 8-Bit/2 M x 16-Bit)
CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
DISTINCTIVE CHARACTERISTICS
ARCHITECTURAL ADVANTAGES
I
Simultaneous Read/Write operations
— Data can be continuously read from one bank while
executing erase/program functions in other bank.
— Zero latency between read and write operations
I
Multiple bank architectures
— Two devices available with different bank sizes (refer
to Table 3)
I
SecSi (Secured Silicon) Sector: Extra 64 KByte
sector
—
Factory locked and identifiable:
16 bytes available for
secure, random factory Electronic Serial Number;
verifiable as factory locked through autoselect
function. ExpressFlash option allows entire sector to
be available for factory-secured data
—
Customer lockable:
Can be read, programmed, or
erased just like other sectors. Once locked, data
cannot be changed
I
Zero Power Operation
— Sophisticated power management circuits reduce
power consumed during inactive periods to nearly
zero.
I
Package options
— 63-ball FBGA
— 56-pin SSOP
— 48-pin TSOP
I
Top or bottom boot block
I
Manufactured on 0.32 μm process technology
I
Compatible with JEDEC standards
— Pinout and software compatible with
single-power-supply flash standard
PERFORMANCE CHARACTERISTICS
I
High performance
— Access time as fast 90 ns
— Program time: 7 μs/word typical utilizing Accelerate
function
I
Ultra low power consumption (typical values)
— 2 mA active read current at 1 MHz
— 10 mA active read current at 5 MHz
— 200 nA in standby or automatic sleep mode
I
Minimum 1 million write cycles guaranteed per
sector
I
20 year data retention at 125
°
C
— Reliable operation for the life of the system
SOFTWARE FEATURES
I
Data Management Software (DMS)
— AMD-supplied software manages data programming,
enabling EEPROM emulation
— Eases historical sector erase flash limitations
I
Supports Common Flash Memory Interface (CFI)
I
Erase Suspend/Erase Resume
— Suspends erase operations to allow programming in
same bank
I
Data# Polling and Toggle Bits
— Provides a software method of detecting the status of
program or erase cycles
I
Unlock Bypass Program command
— Reduces overall programming time when issuing
multiple program command sequences
HARDWARE FEATURES
I
Any combination of sectors can be erased
I
Ready/Busy# output (RY/BY#)
— Hardware method for detecting program or erase
cycle completion
I
Hardware reset pin (RESET#)
— Hardware method of resetting the internal state
machine to the read mode
I
WP#/ACC input pin
— Write protect (WP#) function allows protection of two
outermost boot sectors, regardless of sector protect
status
— Acceleration (ACC) function provides accelerated
program times
I
Sector protection
— Hardware method of locking a sector, either
in-system or using programming equipment, to
prevent any program or erase operation within that
sector
— Temporary Sector Unprotect allows changing data in
protected sectors in-system
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