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參數資料
| 型號： | AM79C961A |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
| 中文描述： | PCnet⑩- 2跳線的ISA，全雙工單芯片以太網控制器為ISA |
| 文件頁數： | 1/85頁 |
| 文件大小： | 1088K |
| 代理商： | AM79C961A |
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PRELIMINARY
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Publication#
19364
Issue Date:
September 1996
Rev:
A
Amendment/
+3
Am79C961A
PCnet
-ISA II Jumperless, Full Duplex Single-Chip
Ethernet Controller for ISA
DISTINCTIVE CHARACTERISTICS
Single-chip Ethernet controller for the Industry
Standard Architecture (ISA) and Extended
Industry Standard Architecture (EISA) buses
I
Supports IEEE 802.3/ANSI 8802-3 and Ethernet
standards
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Supports full duplex operation on the
10BASE-T, AUI, and GPSI ports
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Direct interface to the ISA or EISA bus
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Pin compatible to Am79C961 PCnet-ISA
Jumperless Single-Chip Ethernet Controller
I
Software compatible with AMD’s Am7990
LANCE register and descriptor architecture
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Low power, CMOS design with sleep mode
allows reduced power consumption for critical
battery powered applications
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Individual 136-byte transmit and 128-byte
receive FIFOs provide packet buffering for
increased system latency, and support the
following features:
— Automatic retransmission with no FIFO
reload
— Automatic receive stripping and transmit
padding (individually programmable)
— Automatic runt packet rejection
— Automatic deletion of received collision
frames
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Dynamic transmit FCS generation
programmable on a frame-by-frame basis
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Single +5 V power supply
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Internal/external loopback capabilities
I
Supports 8K, 16K, 32K, and 64K Boot PROMs or
Flash for diskless node applications
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Supports Microsoft’s Plug and Play System
configuration for jumperless designs
I
Supports staggered AT bus drive for reduced
noise and ground bounce
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+
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Supports 8 interrupts on chip
Look Ahead Packet Processing (LAPP)
allows protocol analysis to begin before
end of receive frame
Supports 4 DMA channels on chip
Supports 16 I/O locations
Supports 16 boot PROM locations
Provides integrated Attachment Unit Interface
(AUI) and 10BASE-T transceiver with 2 modes of
port selection:
— Automatic selection of AUI or 10BASE-T
— Software selection of AUI or 10BASE-T
Automatic Twisted Pair receive polarity
detection and automatic correction of the
receive polarity
Supports bus-master, programmed I/O, and
shared-memory architectures to fit in any PC
application
Supports edge and level-sensitive interrupts
DMA Buffer Management Unit for reduced CPU
intervention which allows higher throughput by
by-passing the platform DMA
JTAG Boundary Scan (IEEE 1149.1) test access
port interface for board level production test
Integrated Manchester Encoder/Decoder
Supports the following types of network
interfaces:
— AUI to external 10BASE2, 10BASE5,
10BASE-T or 10BASE-F MAU
— Internal 10BASE-T transceiver with Smart
Squelch to Twisted Pair medium
Supports LANCE General Purpose Serial
Interface (GPSI)
132-pin PQFP package
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相關PDF資料 |
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| AM79C961AKIW | PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
| AM79C961AVCW | PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
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| Am79C965A | PCnet?-32 Single-Chip 32-Bit Ethernet Controller |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AM79C961A_00 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
| AM79C961AKC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
| AM79C961AKC/W | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller |
| AM79C961AKCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
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