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參數資料
| 型號： | AMC8500DE16 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | TWO PHASE VARIABLE SPEED FAN MOTOR CONTROLLER |
| 中文描述： | 兩相流變速風扇電機控制器 |
| 文件頁數： | 23/27頁 |
| 文件大?。?/td> | 648K |
| 代理商： | AMC8500DE16 |
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P
P
Preliminary Specification
Andigilog, Inc. 2006
www.andigilog.com
August 2006 - 70A04018
aMC8500
Figure 42- Speed Control Alarm
Min Speed
Com
p
PWM Comp
- 23 -
Reference
Op Amp
Oscillator
R
10
6
9
8
7
5
R2
R1
V
th
Speed
Alarm
Output
V
th
0 V
3.0 V
V
OL
V
OH
Speed
Control
Input
Pin 11 = Gnd
V
th
= 1 + 0.02(%ton)
Pin 11 = Open
V
th
= 3 - 0.02(%ton)
R2/R1 = (V
ref
/ V
th
) - 1
Min Speed
Comp
PWM Comp
R1
Reference
Op Amp
Oscillator
R
10
6
9
8
7
5
R2
V
th
Speed
Alarm
Output
V
OH
V
th
0 V
3.0 V
Speed
Control
Input
V
OL
The programmable minimum speed set feature can be preserved when controlling motor speed from a varying duty cycle pulse. The
above circuit uses transistor Q1, capacitor C1 and the Reference to convert the digital control signal to an analog voltage. With the
resistor values shown, the voltage at Pin 10 varies between 3.0 V with Q1 off and 1.0 V with Q1 on, which represents a PWM on-time of
0% and 100% respectively. The value of capacitor C1 is dependent upon the pulse frequency and should be sized be so that the ripple
at Pin 10 is less than 10 mV. The Op Amp is not required in this application and is connected as a unity gain follower with the non-
inverting grounded. The Minimum Speed Set input is programmed for a PWM on-time of approximately 33%. Since the Reference is
always required, the programming resistors also provide a load that exceeds 2.0 mA for disabling the automatic power down feature.
The Op Amp and Reference can be used to generate a speed control alarm signal. Resistors R1 and R2 divide down the Reference
output voltage to set trip threshold V
. The Op Amp compares the speed control input voltage to the trip threshold and the output
changes state when it is crossed. In the circuit on the left, the speed alarm output transitions from a low to high state as the Speed
Control Input voltage increases. With the circuit on the right, the speed alarm output transitions from a high to low state as the speed
control input voltage increases. Threshold hysteresis can be added to the circuit on the right by placing a resistor from Pin 9 to Pin 7.
909
36 k
12 V
Pulse
Input
13
7
6
Fault Timer
Power Down
Kick Start
Reference
Hall Amplifier
Non-Overlap
Commutation
H
Current Limit
Comp
Motor
Drives
Op Amp
Oscillator
R
Min Speed
Comp
PWM Comp
Digital
Detector
Thermal
Shutdown
Under Voltage
Lockout
Current
Limit
Latch
R
Q
S
16
1
12
15
14
10
9
8
5
11
2
N
S
M
S
N
3
4
PWM
Logic
C1
0.1
2.7 k
10 k
6.2 k
453
Q1
10 nF
10
μ
A
Figure 41- Digital Pulse Speed Control with Programmable Minimum Speed Set
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