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| 型號(hào)： | AN-686 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | APPLICATION NOTE |
| 中文描述： | 應(yīng)用筆記 |
| 文件頁數(shù)： | 2/2頁 |
| 文件大小： | 50K |
| 代理商： | AN-686 |
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AN-686
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2003 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners.
What should you do The slave must be permitted to fin-
ish sending this last byte or be reset externally.
Solution 1: Clocking Through the Problem
The first solution (letting the slave finish) requires
no additional hardware because it is implemented in
software. Note that while this method is very effective,
it may not be possible to clear a hung bus on every
manufacturer’s device all the time. (The design of the
I
2
C state machine will determine the effectiveness of the
clocking approach.)
The method is quite simple. It is the master’s job to recover
the bus and restore control to the main program. When
the master detects the SDA line stuck in the low state, it
merely needs to send some additional clocks and gener-
ate a STOP condition. How many clocks will be needed
The number will vary with the number of bits that remain
to be sent by the slave. The maximum would be 9. This
number is derived from the worst-case scenario, the case
where the processor was reset just after sending an ACK
to the slave. Now the slave is ready to send 8 data bits and
receive 1 ACK (or NAK in the case of a bus recovery).
The procedure is as follows:
1) Master tries to assert a Logic 1 on the SDA line
2) Master still sees a Logic 0 and then generates a clock
pulse on SCL (1-0-1 transition)
3) Master examines SDA. If SDA = 0, go to Step 2; if
SDA = 1, go to Step 4
4) Generate a STOP condition
Note that this process may need to be repeated because
the cleared SDA line may have been cleared for the next
bit, which was a 1. There may be some concern about the
effect this additional clocking and STOPping has on other
peripherals. There is no adverse effect; other slaves are
not paying attention due to the fact that they have not
been addressed. Only the slave that had the interrupted
message will respond to the clocks.
This procedure is useful in the system code to help re-
store the bus in the event that an SDA = 0 bus fault is
encountered, regardless of the reason.
Solution 2: Adding a Reset Pin to an I
2
C Slave
Another method will reset the I
2
C slave. One function
never seen on an I
2
C slave is a reset pin. To remedy this
type of problem, a reset function is added via additional
hardware: an analog switch. The analog switch needs
several attributes to perform the reset function properly.
The ADG749 fills the requirements:
Small package: the SC70 requires less than 5 square
mm of board space
SPDT switch with break-before-make action
Very low on resistance: 3.5 at 5 V and 4.5 at 3 V
Excellent on resistance flatness (allows repeatable
resets in digital devices)
At 1 A of supply current, the power budget is not
affected
The diagram below shows how the ADG749 can provide a
reset to an I
2
C slave device. When a reset to the slave must
occur, the processor sends a logic low to the control pin
on the analog switch now labeled
RESET
(see diagram).
The low going reset pulse must be of sufficient width to
permit the switch to discharge the decoupling capacitors
and internal circuitry. The ADG749 is capable of generat-
ing a reset to many I
2
C devices with their associated
decoupling capacitors. Testing has shown that a 15 s
reset pulse will switch the V
DD
line of 2 slaves and 1 F of
capacitance to within 0.1 V of ground in <10 s. The turn
on time is equally impressive at <5 s, which means that
the I
2
C state machine will reset itself on power up.
With an operational voltage range of 1.8 V to 5.5 V, the
ADG749 permits literally any I
2
C device to be reset by the
processor. Analog Devices has other analog switches if
level translation functions are required.
NOTE: SWITCH SHOWN WITH
RESET
= LOGIC 1
ADG749
V
DD
GND
S1
D
S2
I
2
C DEVICE
V
DD
GND
RESET
Figure 1. Simple Interface Resets I
2
C Bus
Purchase of licensed I
2
C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I
2
C
Patent Rights to use these components in an I
C system, provided that the system conforms to the I
C Standard Specification as defined by Philips.
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